參數(shù)資料
型號(hào)： HD74AC
廠商： Hitachi,Ltd.
英文描述： HD74AC Series Common Information
中文描述： HD74AC系列通用信息
文件頁(yè)數(shù)： 51/52頁(yè)
文件大小： 220K
代理商： HD74AC
Design Considerations
50
8. Testing Disable Times of 3-State Outputs in a Transmission Line Environment
Traditionally, the disable time of a 3-state buffer has been measured from the 50% point on the disable
input, to the 10% or 90% point on the output. On a bench test site, the output waveform is generated by a
load capacitor and a pull-up/pull-down resistor. This circuit gives an RC charge/discharge curve as shown
in figure 25.
OUTPUT
OE
V
Time (ns)
0
1
2
3
4
5
1
2
3
4
5
6
7
8
9
10 11 12
Figure 25 Typical Bench 3-State Waveform
ATE test sites generally are unable to duplicate the bench test structure. ATE test loads differ because they
are usually programmable and are situated away from the actual device. A commonly used test load is a
Wheatstone bridge. Figure 26 illustraters the Wheatstone bridge test structure when used on the MCT 2000
test-system to duplicate the bench load.
+
-
DUT
Figure 26 MCT Wheatstone Bridge Test Load
The voltage source provides a pull-up/pull-down voltage while the current sources provide I
OH
and I
OL
.
When devices with slow output slew rates are tested with the ATE load, the resultant waveforms closely
approximate the bench waveform, and a high degree of correlation can be achieved. However, when
devices with high output slew rates are tested, different results are observed that make correlating tester
results with bench results more difficult. This difference is due to the transmission line properties of the
test equipment. Most disable tests are preceded by establishing a current flow through the output structure.
Typically, these currents will be between 5 mA and 20 mA. The device is then disabled, and a comparator
detects when the output has risen to the 10% or 90% level. Consider the situation where the connection
between the device under test (DUT) and the comparator is a transmission line. Visualize the device
output as a switch; the effect is easier to see. There is current flowing through the line, and then the switch
is opened. At the device end, the reflection coefficient changes from 0 to 1. This generates a current edge
相關(guān)PDF資料
PDF描述
HD74ALVC162244 16-bit Buffer / Driver with 3-state Outputs(帶三態(tài)輸出的16位緩沖器/驅(qū)動(dòng)器)
HD74ALVC162334 16-bit Universal Bus Driver with 3-state Outputs(帶三態(tài)輸出的16位通用總線驅(qū)動(dòng)器)
HD74ALVC16244 16-bit Buffer / Driver with 3-state Outputs(帶三態(tài)輸出的16位緩沖器/驅(qū)動(dòng)器)
HD74ALVC162831 1-bit to 4-bit Address Register / Driver with 3-state Outputs(三態(tài)輸出的1位-4位地址寄存器/驅(qū)動(dòng)器)
HD74ALVC162834A 1-Of-8 Data Selectors/Multiplexers 16-CDIP -55 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HD74AC00 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Quad 2-Input NAND Gate
HD74AC00FP 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate
HD74AC00FPEL 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Quad 2-Input NAND Gate
HD74AC00P 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Quad 2-Input NAND Gate
HD74AC00RPEL 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Quad 2-Input NAND Gate
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