參數(shù)資料
型號: HD74AC
廠商: Hitachi,Ltd.
英文描述: HD74AC Series Common Information
中文描述: HD74AC系列通用信息
文件頁數(shù): 31/52頁
文件大?。?/td> 220K
代理商: HD74AC
Definition of Specifications
30
Symbol
Term
Description
t
rec
Recovery time
Time period between the time when data at the
specified input terminal is released and the time
when another related input terminal (e.g., clock
input) can be changed
C
IN
Input capacitance
Capacitance between GND terminal and an input
terminal to which 0 V is applied
C
PD
Power Dissipation Capacitance
Equivalent device power capacitance in dynamic
state
Table 7 Explanation of Symbols Used in Function Tables
Symbol
Description
H
High level (in steady state; written H or "H" level in sentences)
L
Low level (in steady state; written L or "L" level in sentences)
Transition from L level to H level
Transition from H level to L level
X
Either H or L
Z
3-state output off (high impedance)
a·····h
Input level of steady state for each of inputs A-H
Q
0
Q level immediately before the indicated input condition is established
Q
0
Q
n
Complement of Q
0
Q level immediately before the latest active change (
or
) occurs
Single H level pulse
Single L level pulse
TOGGLE
Each output is changed to the complement of the preceding state by an active input
change (
or
)
相關PDF資料
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HD74ALVC162244 16-bit Buffer / Driver with 3-state Outputs(帶三態(tài)輸出的16位緩沖器/驅(qū)動器)
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相關代理商/技術參數(shù)
參數(shù)描述
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