參數(shù)資料
型號(hào): HD74AC
廠商: Hitachi,Ltd.
英文描述: HD74AC Series Common Information
中文描述: HD74AC系列通用信息
文件頁數(shù): 11/52頁
文件大?。?/td> 220K
代理商: HD74AC
FACT Descriptions and Family Characteristics
10
2. Circuit Characteristics
2.1 Power Dissipation
One advantage to using CMOS logic is its extremely low power consumption. During quiescent
conditions, FACT will consume several orders of magnitude less current than its bipolar counterparts. But
DC power consumption is not the whole picture. Any circuit will have AC power consumption, whether it
is built with CMOS or bipolar technologies.
Power consumption of a circuit can be calculated using the formula:
P
D
= [(C
L
+ C
PD
) V
CC
V
S
f] + [I
Q
V
CC
]
where:
P
D
= power dissipation
C
L
= load capacitance
C
PD
= device power capacitance
V
CC
= power supply
V
S
= output voltage swing
f = frequency of operation
I
Q
= quiescent current
Power consumption for FACT is dependent on the supply voltage, frequency of operation, internal
capacitance and load. V
S
will be V
CC
and I
Q
can be considered negligible for CMOS. Therefore, the
simplified formula for CMOS is:
P
D
= (C
L
+ C
PD
)V
CC
2
f
C
PD
values for CMOS devices are calculated by measuring the power consumption of a device at two
different frequencies. C
PD
is calculated in the following manner.
1. The power supply voltage is set to V
CC
= 5.0 VDC.
2. Signal inputs are set up so that as many outputs as possible are switching, giving a worst-case
situation per JEDEC C
PD
conditions.
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