參數(shù)資料
型號(hào)： HD74AC
廠商： Hitachi,Ltd.
英文描述： HD74AC Series Common Information
中文描述： HD74AC系列通用信息
文件頁(yè)數(shù)： 16/52頁(yè)
文件大?。?/td> 220K
代理商： HD74AC
FACT Descriptions and Family Characteristics
15
0
1
2
3
4
5
6
7
8
9
10
t
f
10
20
30
40
50
Load Capacitance (pF)
V
CC
= 5.0V
Ta = 25
°
C
Figure 14 t
fall
vs. Capacitance
P-Channel MOS
+V
DD
-V
SS
N-Channel MOS
N-Substrate
Output
Input
N-well
N+
N+
P+
N+
P+
P-well
P+
Figure 15 CMOS Inverter Cross Section with Latch-up Circuit Schematic
2.3 Latch-up
A major problem with CMOS has been its sensitivity to latch-up, usually attributed to high parasitic gains
and high input impedance (figure 15). FACT logic is guaranteed not to latch-up with dynamic currents of
100 mA forced into or out of the inputs or the outputs under worst case conditions (Ta = 85C and V
CC
=
5.5 VDC). At room temperature the parts can typically withstand dynamic currents of over 450 mA. For
most designs, latch-up will not be a problem, but the designer should be aware of its causes and how to
prevent it.
FACT devices have been specifically designed to reduce the possibility of latch -up occurring; Hitachi
accomplished this by lowering the gain of the parasitic transistors, reducing N-well and p-well resistivity to
increase external drive current required to cause a parasitic to turn on, and careful design and layout to
minimize the substrate-injected current coupling to other circuit areas.
相關(guān)PDF資料
PDF描述
HD74ALVC162244 16-bit Buffer / Driver with 3-state Outputs(帶三態(tài)輸出的16位緩沖器/驅(qū)動(dòng)器)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HD74AC00 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Quad 2-Input NAND Gate
HD74AC00FP 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate
HD74AC00FPEL 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Quad 2-Input NAND Gate
HD74AC00P 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Quad 2-Input NAND Gate
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