參數(shù)資料
型號: GS816136
廠商: GSI TECHNOLOGY
英文描述: 16Mb Pipelined and Flow Through Synchronous NBT SRAM(16M位流水線式和流通型同步NBT靜態(tài)RAM)
中文描述: 16Mb的流水線和流量,通過同步唑的SRAM(1,600位流水線式和流通型同步唑靜態(tài)內(nèi)存)
文件頁數(shù): 9/32頁
文件大小: 584K
代理商: GS816136
Rev: 2.07 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
9/32
1999, Giga Semiconductor, Inc.
Preliminary
GS816118/36T-225/200/180/166/150/133
Synchronous Truth Table
Operation
Address Used
State
Diagram
Key
5
X
X
X
R
R
W
CR
CR
CW
CW
E
1
ADSP
ADSC
ADV
W
3
DQ
4
Deselect Cycle, Power Down
Deselect Cycle, Power Down
Deselect Cycle, Power Down
Read Cycle, Begin Burst
Read Cycle, Begin Burst
Write Cycle, Begin Burst
Read Cycle, Continue Burst
Read Cycle, Continue Burst
Write Cycle, Continue Burst
Write Cycle, Continue Burst
Read Cycle, Suspend Burst
Read Cycle, Suspend Burst
Write Cycle, Suspend Burst
Write Cycle, Suspend Burst
Notes:
1.
X = Don’t Care, H = High, L = Low
2.
W = T (True) and F (False) is defined in the Byte Write Truth Table preceding.
3.
G is an asynchronous input. G can be driven high at any time to disable active output drivers. G low can only enable active drivers (shown
as “Q” in the Truth Table above).
4.
All input combinations shown above are tested and supported. Input combinations shown in gray boxes need not be used to accomplish
basic synchronous or synchronous burst operations and may be avoided for simplicity.
5.
Tying ADSP high and ADSC low allows simple non-burst synchronous operations. See
BOLD
items above.
6.
Tying ADSP high and ADV low while using ADSC to load new addresses allows simple burst operations. See
ITALIC
items above.
None
None
None
External
External
External
Next
Next
Next
Next
Current
Current
Current
Current
H
L
L
L
L
L
X
H
X
H
X
H
X
H
X
L
H
L
H
H
H
X
H
X
H
X
H
X
L
X
L
X
L
L
H
H
H
H
H
H
H
H
X
X
X
X
X
X
L
L
L
L
H
H
H
H
X
X
X
X
F
T
F
F
T
T
F
F
T
T
High-Z
High-Z
High-Z
Q
Q
D
Q
Q
D
D
Q
Q
D
D
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