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參數(shù)資料
| 型號： | GS1560A* |
| 英文描述： | Reclocking deserializer for HD-SDI. SD-SDI & DVB-ASI with loop thru cable driver. 3.3/1.8V supply. |
| 中文描述： | 時鐘重計解串器的HD - SDI的。標清SDI |
| 文件頁數(shù)： | 46/55頁 |
| 文件大小： | 922K |
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GENNUM CORPORATION
27360 - 2
46 of 55
G
3.11 PARALLEL DATA OUTPUTS
Data outputs leave the device on the rising edge of PCLK
as shown in Figure 13 and Figure 14.
The data may be scrambled or unscrambled, framed or
unframed, and may be presented in 10-bit or 20-bit format.
The output data bus width is controlled independently from
the internal data bus width by the 20bit/10bit input pin.
Likewise, the output data format is defined by the setting of
the external SD/HD, SMPTE_BYPASS and DVB_ASI pins.
Recall that in slave mode, these pins are set by the
application layer as inputs to the device. In master mode,
however, the GS1560A sets these pins as output status
signals.
3.11.1 Parallel Data Bus Buffers
The parallel data outputs of the GS1560A are driven by
high-impedance buffers which support both LVTTL and
LVCMOS levels. These buffers use a separate power supply
of +3.3V DC supplied via the IO_VDD and IO_GND pins.
All output buffers, including the PCLK output, may be driven
to a high-impedance state if the RESET_TRST signal is
asserted LOW.
Note that the timing characteristics of the parallel data
output buffers are optimized for 10-bit HD operation. As
shown in Figure 13, the output data hold time for HD is
1.5ns.
Due to this optimization, however, the output data hold time
for SD data is so small that the rising edge of the PCLK is
nearly incident with the data transition. To improve output
hold time at SD rates, the PCLK output is inverted is SD
mode, (SD/HD = HIGH). This is shown in Figure 14.
TABLE 15 HOST INTERFACE DESCRIPTION FOR EDH FLAG REGISTER
REGISTER NAME
BIT
NAME
DESCRIPTION
R/W
DEFAULT
EDH_FLAG
Address: 003h
15
Not Used
14
ANC-UES out
Ancillary Unknown Error Status Flag.
R
0
13
ANC-IDA out
Ancillary Internal device error Detected Already Flag.
R
0
12
ANC-IDH out
Ancillary Internal device error Detected Here Flag.
R
0
11
ANC-EDA out
Ancillary Error Detected Already Flag.
R
0
10
ANC-EDH out
Ancillary Error Detected Here Flag.
R
0
9
FF-UES out
Full Field Unknown Error Status Flag.
R
0
8
FF-IDA out
Full Field Internal device error Detected Already Flag.
R
0
7
FF-IDH out
Full Field Internal device error Detected Here Flag.
R
0
6
FF-EDA out
Full Field Error Detected Already Flag.
R
0
5
FF-EDH out
Full Field Error Detected Here Flag.
R
0
4
AP-UES out
Active Picture Unknown Error Status Flag.
R
0
3
AP-IDA out
Active Picture Internal device error Detected Already Flag.
R
0
2
AP-IDH out
Active Picture Internal device error Detected Here Flag.
R
0
1
AP-EDA out
Active Picture Error Detected Already Flag.
R
0
0
AP-EDH out
Active Picture Error Detected Here Flag.
R
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS1560A_07 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Dual-Rate Deserializer |
| GS1560A_09 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD-LINX II Dual-Rate Deserializer |
| GS1560ACF | 制造商:Rochester Electronics LLC 功能描述: 制造商:Gennum Corporation 功能描述: |
| GS1560ACFE3 | 制造商:Semtech Corporation 功能描述:Reclocking deserializer.Receiver for HD/SD/ASI w/ loop through. LQFP80 |
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