參數(shù)資料
型號(hào): GS1560A*
英文描述: Reclocking deserializer for HD-SDI. SD-SDI & DVB-ASI with loop thru cable driver. 3.3/1.8V supply.
中文描述: 時(shí)鐘重計(jì)解串器的HD - SDI的。標(biāo)清SDI
文件頁數(shù): 12/55頁
文件大?。?/td> 922K
GENNUM CORPORATION
27360 - 2
12 of 55
G
51, 52,
54–59, 62,
63
DOUT[10:19]
Synchronous
with PCLK
Output
PARALLEL DATA BUS
Signal levels are LVCMOS/LVTTL compatible.
DOUT19 is the MSB and DOUT10 is the LSB.
HD 20-bit mode
SD/HD = LOW
20bit/10bit = HIGH
Luma data output in SMPTE mode
SMPTE_BYPASS = HIGH
DVB_ASI = LOW
Data output in Data-Through mode
SMPTE_BYPASS = LOW
DVB_ASI = LOW
HD 10-bit mode
SD/HD = LOW
20bit/10bit = LOW
Multiplexed Luma and Chroma data output
in SMPTE mode
SMPTE_BYPASS = HIGH
DVB_ASI = LOW
Data output in Data-Through mode
SMPTE_BYPASS = LOW
DVB_ASI = LOW
SD 20-bit mode
SD/HD = HIGH
20bit/10bit = HIGH
Luma data output in SMPTE mode
SMPTE_BYPASS = HIGH
DVB_ASI = LOW
Data output in Data-Through mode
SMPTE_BYPASS = LOW
DVB_ASI = LOW
DVB-ASI data in DVB-ASI mode
SMPTE_BYPASS = LOW
DVB_ASI = HIGH
SD 10-bit mode
SD/HD = HIGH
20bit/10bit = LOW
Multiplexed Luma and Chroma data output
in SMPTE mode
SMPTE_BYPASS
= HIGH
DVB_ASI = LOW
Data input in data through mode
SMPTE_BYPASS
= LOW
DVB_ASI = LOW
DVB-ASI data in DVB-ASI mode
SMPTE_BYPASS
= LOW
DVB_ASI = HIGH
65
YANC
Synchronous
with PCLK
Output
STATUS SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to indicate the presence of ancillary data in the video stream.
HD Mode (SD/HD = LOW)
The YANC signal will be HIGH when the device has detected VANC or
HANC data in the luma video stream and LOW otherwise.
SD Mode (SD/HD = LOW)
For 20-bit demultiplexed data (20bit/10bit = HIGH), the YANC signal will
be HIGH when VANC or HANC data is detected in the luma video stream
and LOW otherwise.
For 10-bit multiplexed data (20bit/10bit = LOW), the YANC signal will be
HIGH when VANC or HANC data is detected anywhere in the data stream
and LOW otherwise.
1.2 PIN DESCRIPTIONS (CONTINUED)
PIN
NUMBER
NAME
TIMING
TYPE
DESCRIPTION
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