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參數(shù)資料
| 型號(hào)： | GMS87C7216LQ |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | 8-BIT SINGLE-CHIP MICROCONTROLLERS |
| 中文描述： | 8位單晶片微控制器 |
| 文件頁(yè)數(shù)： | 56/121頁(yè) |
| 文件大?。?/td> | 1645K |
| 代理商： | GMS87C7216LQ |
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GMS81C7208/7216
52
FEB. 2005 Ver 1.04
14. ANALOG DIGITAL CONVERTER
The analog-to-digital converter (A/D) allows conversion of an
analog input signal to a corresponding 8-bit digital value. The A/
D module has three analog inputs, which are multiplexed into one
sample and hold. The output of the sample and hold is the input
into the converter, which generates the result via successive ap-
proximation. The analog supply voltage is connected to AV
DD
of
ladder resistance of A/D module.
The A/D module has two registers which are the control register
ADCM and A/D result register ADR. The register ADCM, shown
in Figure 14-4, controls the operation of the A/D converter mod-
ule. The port pins can be configured as analog inputs or digital I/
O. To use analog inputs, I/O is selected input mode by R2DD di-
rection register.
How to Use A/D Converter
The processing of conversion is start when the start bit ADST is
set to “1”. After one cycle, it is cleared by hardware. The register
ADR contains the results of the A/D conversion. When the con-
version is completed, the result is loaded into the ADR, the A/D
conversion status bit ADSF is set to “1”, and the A/D interrupt
flag AIF is set. The block diagram of the A/D module is shown in
Figure 14-1. The A/D status bit ADSF is set automatically when
A/D conversion is completed, cleared when A/D conversion is in
process. The conversion time takes maximum 20 uS (at f
XIN
=4
MHz).
Figure 14-1 A/D Block Diagram
A/D Converter Cautions
(1) Input voltage range of AN1 to AN3
The input voltage of AN1 to AN3 should be within the specifica-
tion range. In particular, if a voltage above AV
DD
or below AV
SS
is input (even if within the absolute maximum rating range), the
conversion value for that channel can not be indeterminate. The
conversion values of the other channels may also be affected.
(2) Noise countermeasures
In order to maintain 8-bit resolution, attention must be paid to
noise on pins AV
DD
and AN1 to AN3. Since the effect increases
in proportion to the output impedance of the analog input source,
it is recommended that a capacitor be connected externally as
shown in Figure 14-2 in order to reduce noise.
.
Figure 14-2 Analog Input Pin Connecting Capacitor
R21/AN1
R22/AN2
R23/AN3
S/H
Sample & Hold
“0”
“1”
ADEN
AV
DD
8
L
ADIF
A/D
INTERRUPT
SUCCESSIVE
APPROXIMATION
CIRCUIT
ADR
A/D result register
ADDRESS: ED
RESET VALUE: Undefined
001
010
011
ADS[2:0]
AN1~AN3
100~1000pF
Analog
Input
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