參數(shù)資料
型號: GCIXF440ACT
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 81/128頁
文件大小: 1262K
代理商: GCIXF440ACT
Intel
IXF1002 Dual Port Gigabit Ethernet Controller
Datasheet
81
Underflow
Transmit data is not ready when needed for transmission. The packet is terminated on the
network with a bad CRC and transmit error generation (terr assertion in GMII mode, or
symbol error in GPCS mode).
6.4.5
Flow Control
The IXF1002 supports the standard flow control defined in the IEEE 802.3 Standard, enabling the
stopping of remote node transmissions. Upon triggering, the IXF1002 sends a flow-control frame
in the following format:
The source address field (EA1
EA6) is taken from the MAC_ADD register.
The IXF1002 supports all combinations of symmetric or asymmetric flow-control function. Upon
assertion of the flct_{i} signal or setting of the flow-control trigger bit (SER_COM<FCT>), a
flow-control frame is sent with the pause time field (PT1
PT2) equal to the PAUSE_TIME
register. Upon deassertion of the flct_{i} signal, another flow-control frame will be sent with the
pause time field equal to zero, meaning that the remote node may resume transmission. If the XON
mode is disabled (TX_RX_PARAM<XOND>), the flow-control frame will not be transmitted on
deassertion. If a flow-control was triggered during transmission of another packet, the flow-control
packet will be transmitted immediately after the packet currently being sent. If more than one
flow-control packet is triggered during transmission, only the last one is considered.
6.4.5.1
Additional Flow-Control Mode
When the additional flow control is enabled (TX_RX_PARAM<ADFC=1>), the IXF1002 will
send an additional flow-control packet if a flow-control packet was sent upon assertion of the
flct_{i} signal, and while this signal was asserted, the link partner
s pause time period was about to
end.
This will cause the link partner to receive the additional flow-control packet before its pause time
counting ends.
Note:
This feature is operative only if XOND bit is equal to 0.
Destination
Address
Source
Address
Type
Op-Code
Pause
Time
Padding
FCS
Byte
Count
6
6
2
2
2
42
4
Value
(Canonic
Form)
01-80-C2-00-00-01 EA1-EA2-..-EA6
88-08
00-01
PT1-PT2
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