參數(shù)資料
型號(hào): GCIXF440ACT
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁數(shù): 77/128頁
文件大?。?/td> 1262K
代理商: GCIXF440ACT
Intel
IXF1002 Dual Port Gigabit Ethernet Controller
Datasheet
77
6.0
Network Interface Operation
This section describes the GMII/GPCS port operation. It also describes media access control
(MAC), full-duplex, and loopback operations. The IXF1002 supports implementation of the MAC
sublayer according to the IEEE 802.3z standard, in full-duplex mode.
6.1
Operating Modes
Each of the IXF1002 two ports supports GMII or GPCS interfaces.
In the GMII mode, the GMII port provides a standard and simple interconnection between the
MAC sublayer and the PHY layer. In this mode, the IXF1002 can be used with any device with an
GMII interface that implements the 1000BASE-SX, 1000BASE-LX, 1000BASE-CX, or
1000BASE-T standards.
The GMII interface comprises the following characteristics:
Supports 1000 Mb/s data rate
Includes data and delimiters that are synchronous to clock references
Provides independent, 8-bit-wide transmit and receive data paths
Utilizes TTL signal levels
Provides a simple management interface through mdc and mdio signals
In the GPCS mode, the 8B/10B encoding/decoding is done by the IXF1002, which enables
connection of serializer/deserializer (SERDES) devices implementing de/serialization and clock
recovery for the 1000BASE-SX, 1000BASE-LX or 1000BASE-CX standards.
The GPCS port is multiplexed together with the GMII port.
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