參數(shù)資料
型號(hào)： FPD87310
廠商： National Semiconductor Corporation
英文描述： Universal Interface XGA Panel Timing Controller with RSDS⑩ (Reduced Swing Differential Signaling) and FPD-Link
中文描述： 通用接口的XGA小組與區(qū)特別職務(wù)隊(duì)⑩（低擺幅差分信號(hào)）和FPD時(shí)序控制鏈路
文件頁(yè)數(shù)： 9/28頁(yè)
文件大?。?/td> 754K
代理商： FPD87310
Block Diagram
Functional Description
FPD-Link RECEIVER
The LVDS based FPD-Link Receiver inputs video data and
control timing. 4-LVDS channels plus clock provide 24 bits
color. 3-LVDS channels can be used for 18 bits color. The
video data is regenerated to a parallel data stream and
routed to the 8-6 bit translator.
The GPOs (General Purpose Outputs) continue outputting
the programmed control sequence at a reduced frame rate.
RSTZ initialized the chip with the default register values.
SPREAD SPECTRUM SUPPORT
The FPD-Link receiver supports graphics controllers with
Spread Spectrum interfaces for reducing EMI. The Spread
Spectrum method supported is Center Spread. A maximum
of 2% Center Spread is supported at a frequency modulation
of 200kHz maximum.
8–6 BIT TRANSLATOR
8-bit data is reduced to a 6-bit data path via a time multi-
plexed dithering technique or simple truncation of the LSBs.
This function is enabled via the Input Control Register bits
[4,3]. Care should be taken in providing the correct input
color mapping (seeFigure 4)
DATAPATH BLOCK AND RSDS TRANSMITTER
6-bit video data (RGB) is input to the Datapath Block at a
65 MHz rate.
The data is delayed to align the Column Driver Start Pulse
(SP) with the Column Driver data. The data (RSR[2:0]P/N,
RSG[2:0]P/N, RSB[2:0]P/N) is output at a 130 MHz rate on 9
differential output channels (9 pairs of outputs).
The clock is output on the RSCKP/N differential pair.
The RSDS Column Drivers latch data on both positive and
negative edges of the clock.
VERTICAL AND HORIZONTAL COUNTER
The counter block provides control to the Column Drivers,
Row Drivers, and power supply as GPOs (General Purpose
Outputs). Several video input formats are supported; Video
timing which is fixed vertically, and horizontally (ENAB is ig-
nored); Video timing which is fixed vertically, but uses ENAB
for horizontal positioning; ENAB Only Mode which uses
ENAB to position both vertically and horizontally. The FIX-
_VERT and FIX_HORIZ along with internal ENAB detection
circuitry; control the operational mode. The fixed vertical and
horizontal position points are programmable.
TIMING CONTROL
The Timing Control function generates control to Column
Drivers, Row Drivers, and power supply. The programmable
GPOs (General Purpose Outputs) provide for CD latch
pulse, REV, and Row Driver control generation.
The General Purpose Outputs allow the user to generate
control anywhere within the frame data. Standard Row
Driver interface or Custom Row Driver interfaces can be
implemented with the 10 GPOs (General Purpose Outputs).
Note that GPO[9] must be used for output blanking control.
THE GENERAL PURPOSE OUTPUTS
Five registers provide the timing definition for each GPO.
The Horizontal Start Register defines the output pixel
number for which the GPO output goes active.
The Horizontal Duration Register determines how many
clocks the output will remain active during the line.
The Vertical Start Register defines at what line
#
the out-
put become active.
The Vertical Duration Register defines how many lines
the output remains active.
DS101077-3
F
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
FPD87310VHB 功能描述:IC CTRLR PANEL TIMING 80-TQFP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
FPD87346 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low EMI, Low Dynamic Power (SVGA) XGA/WXGA TFT-LCD Timing Controller with Reduced Swing Differential Signaling (RSDS⑩) Outputs
FPD87346BXA 制造商:TI 制造商全稱:Texas Instruments 功能描述:FPD87346BXA Low EMI, Low Dynamic Power (SVGA) XGA/WXGA TFT-LCD Timing Controllerwith Reduced Swing Differential Signaling (RSDS) Outputs
FPD87346BXAVS 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述:
FPD87346BXAVS/NOPB 功能描述:IC TIMING CTLR XGA/WXGA 64-TQFP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
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