參數(shù)資料
型號(hào): EVAL-ADUC7128QSPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 80/92頁(yè)
文件大小: 0K
描述: KIT DEV FOR ADUC7128
產(chǎn)品培訓(xùn)模塊: ARM7 Applications & Tools
Intro to ARM7 Core & Microconverters
設(shè)計(jì)資源: ADUC7128 Dev System Schematic
ADUC7128 Gerber Files
標(biāo)準(zhǔn)包裝: 1
系列: QuickStart™ PLUS 套件
類型: MCU
適用于相關(guān)產(chǎn)品: ADuC7128
所含物品: 評(píng)估板、電源、纜線、軟件、仿真器和說(shuō)明文檔
產(chǎn)品目錄頁(yè)面: 739 (CN2011-ZH PDF)
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ADuC7128/ADuC7129
Rev. 0 | Page 81 of 92
TIMER4—GENERAL-PURPOSE TIMER
TIMER4IRQ
CAPTURE
IRQ[31:0]
32-BIT LOAD
32-BIT
UP/DOWN COUNTER
TIMER1 VALUE
PRESCALER
1, 16, 256,
OR 32768
32.768kHz
OSCILLATOR
CORE CLOCK
FREQUENCY
GPIO
0
602
0-
0
55
Figure 60. Timer4 Block Diagram
Timer4 is a 32-bit, general-purpose count down or count up
timer with a programmable prescalar. The prescalar source
can be the 32 kHz oscillator, the core clock, or one of two external
GPIOs. This source can be scaled by a factor of 1, 16, 256, or
32,768. This gives a minimum resolution of 42 ns when operating
at CD zero, the core is operating at 41.78 MHz, and with a prescalar
of 1 (ignoring external GPIO).
The counter can be formatted as a standard 32-bit value or as
hours:minutes:seconds:hundredths.
Timer4 has a capture register (T4CAP), which can be triggered
by a selected IRQ source initial assertion. Once triggered, the
current timer value is copied to T4CAP, and the timer keeps
running. This feature can be used to determine the assertion of
an event with increased accuracy.
The Timer4 interface consists of five MMRs.
Table 116. Timer4 Interface MMRs
Name
Description
T4LD
A 32-bit register. Holds 32-bit unsigned integers.
T4VAL
A 32-bit register. Holds 32-bit unsigned integers.
This register is read only.
T4CAP
A 32-bit register. Holds 32-bit unsigned integers.
This register is read only.
T4ICLR
An 8-bit register. Writing any value to this register
clears the Timer1 interrupt.
T4CON
The configuration MMR (see Table 117).
Note that if the part is in a low power mode and Timer4 is clocked
from the GPIO or oscillator source, Timer4 continues to operate.
Timer4 reloads the value from T4LD either when Timer 4
overflows, or immediately when T4ICLR is written.
Timer4 Load Register
Name
Address
Default Value
Access
T4LD
0xFFFF0380
0x00000
R/W
T4LD is a 32-bit register that holds the 32-bit value that is
loaded into the counter.
Timer4 Clear Register
Name
Address
Default Value
Access
T4ICLR
0xFFFF038C
0x00
W
This 8-bit, write only MMR is written (with any value) by user
code to refresh (reload) Timer4.
Timer4 Value Register
Name
Address
Default Value
Access
T4VAL
0xFFFF0384
0x0000
R
T4VAL is a 32-bit register that holds the current value of Timer4.
Timer4 Capture Register
Name
Address
Default Value
Access
T4CAP
0xFFFF0390
0x00
R
This is a 32-bit register that holds the 32-bit value captured by
an enabled IRQ event.
Timer4 Control Register
Name
Address
Default Value
Access
T4CON
0xFFFF0388
0x0000
R/W
This 32-bit MMR configures the mode of operation of Timer4.
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