參數(shù)資料
型號(hào)： EVAL-ADUC7128QSPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 57/92頁(yè)
文件大?。?/td> 0K
描述： KIT DEV FOR ADUC7128
產(chǎn)品培訓(xùn)模塊： ARM7 Applications & Tools
Intro to ARM7 Core & Microconverters
設(shè)計(jì)資源： ADUC7128 Dev System Schematic
ADUC7128 Gerber Files
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
類(lèi)型： MCU
適用于相關(guān)產(chǎn)品： ADuC7128
所含物品： 評(píng)估板、電源、纜線(xiàn)、軟件、仿真器和說(shuō)明文檔
產(chǎn)品目錄頁(yè)面： 739 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： ADUC7128BSTZ126-RLDKR-ND - IC DAS MCU ARM7 ADC/DDS 64-LQFP
ADUC7128BCPZ126-RLDKR-ND - IC DAS MCU ARM7 ADC/DDS 64-LFCSP
ADUC7128BSTZ126-RLCT-ND - IC DAS MCU ARM7 ADC/DDS 64-LQFP
ADUC7128BCPZ126-RLCT-ND - IC DAS MCU ARM7 ADC/DDS 64-LFCSP
ADUC7128BSTZ126-RLTR-ND - IC DAS MCU ARM7 ADC/DDS 64-LQFP
ADUC7128BCPZ126-RLTR-ND - IC DAS MCU ARM7 ADC/DDS 64-LFCSP
ADUC7128BSTZ126-ND - IC DAS MCU ARM7 ADC/DDS 64-LQFP
ADUC7128BCPZ126-ND - IC DAS MCU ARM7 ADC/DDS 64-LFCSP
ADuC7128/ADuC7129
Rev. 0 | Page 60 of 92
Table 82. COMxIEN0 MMR Bit Designations
Bit
Name
Description
7:4
RSVD
Reserved.
3
EDSSI
Modem Status Interrupt Enable Bit.
Set by user to enable generation of an interrupt if any of COMxSTA1[3:0] are set.
Cleared by user.
2
ELSI
RX Status Interrupt Enable Bit.
Set by user to enable generation of an interrupt if any of COMxSTA0[3:1] are set.
Cleared by user.
1
ETBEI
Enable Transmit Buffer Empty Interrupt.
Set by user to enable interrupt when buffer is empty during a transmission.
Cleared by user.
0
ERBFI
Enable Receive Buffer Full Interrupt.
Set by user to enable interrupt when buffer is full during a reception.
Cleared by user.
Table 83. COMxIID0 MMR Bit Designations
Bit 2:1
Status Bits
Bit 0
NINT
Priority
Definition
Clearing Operation
00
1
No Interrupt.
11
0
1
Receive Line Status Interrupt.
Read COMxSTA0.
10
0
2
Receive Buffer Full Interrupt.
Read COMxRX.
01
0
3
Transmit Buffer Empty Interrupt.
Write data to COMxTX or read COMxIID0.
00
0
4
Modem Status Interrupt.
Read COMxSTA1.
Table 84. COMxCON1 MMR Bit Designations
Bit
Name
Description
7:5
RSVD
Reserved.
4
LOOPBACK
Loop Back.
Set by user to enable loop-back mode. In loop-back mode, the SOUT is forced high. In addition, the modem
signals are directly connected to the status inputs (RTS to CTS, DTR to DSR, OUT1 to RI, and OUT2 to DCD).
3
Reserved.
2
Reserved.
1
RTS
Request to Send.
Set by user to force the RTS output to 0.
Cleared by user to force the RTS output to 1.
0
DTR
Data Terminal Ready.
Set by user to force the DTR output to 0.
Cleared by user to force the DTR output to 1.
相關(guān)PDF資料
PDF描述
EYM15DRSN CONN EDGECARD 30POS DIP .156 SLD
AIUR-06-272K INDUCTOR POWER 2700UH 10% T/H
V300C3V3C50BF CONVERTER MOD DC/DC 3.3V 50W
AIUR-06-182K INDUCTOR POWER 1800UH 10% T/H
EGM15DRSN CONN EDGECARD 30POS DIP .156 SLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-ADUC7128QSPZ2 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Precision Analog Microcontroller ARM7TDMI MCU with 12-Bit ADC and DDS DAC
EVAL-ADUC7129QSPZ 制造商:Analog Devices 功能描述:- Bulk
EVAL-ADUC812QS 制造商:Analog Devices 功能描述:DEVELOPMENT KIT SYSTEM
EVAL-ADUC812QSP 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:MicroConverter㈢, Multichannel 12-Bit ADC with Embedded Flash MCU
EVAL-ADUC812QSZ 功能描述:BOARD EVALUATION FOR ADUC812 RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 通用嵌入式開(kāi)發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ 套件 標(biāo)準(zhǔn)包裝:1 系列:PICDEM™ 類(lèi)型:MCU 適用于相關(guān)產(chǎn)品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，線(xiàn)纜，元件，CD，PICkit 編程器 產(chǎn)品目錄頁(yè)面:659 (CN2011-ZH PDF)
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*