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參數(shù)資料
| 型號： | DS80C411-FNY+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 41/102頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 75MHZ 16MB HP 100-LQFP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 90 |
| 系列： | 80C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 75MHz |
| 連通性： | 1 線，CAN，EBI/EMI，以太網(wǎng)，SIO，UART/USART |
| 外圍設備： | 電源故障復位，WDT |
| 輸入/輸出數(shù)： | 64 |
| 程序存儲器容量： | 64KB（64K x 8） |
| 程序存儲器類型： | ROM |
| RAM 容量： | 64K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.62 V ~ 3.6 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-LQFP |
| 包裝： | 托盤 |
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DS80C410/DS80C411 Network Microcontrollers with Ethernet and CAN
43 of 102
TIMED-ACCESS PROTECTION
Selected SFR bits are critical to operation, making it desirable to protect them against an accidental write
operation. The timed-access procedure prevents errant behavior from accidentally altering bits that would seriously
affect microcontroller operation. The timed-access procedure requires that the write of a protected bit be
immediately preceded by the following two instructions:
MOV
0C7h, #0AAh
MOV
0C7h, #55h
Writing an AAh followed by a 55h to the timed access register (location C7h), opens a three-cycle window that
allows software to modify one of the protected bits. The protected bits are:
SFR
BIT(S)
NAME
FUNCTION
EXIF (91h)
EXIF.0
BGS
Bandgap Select
P4CNT (92h)
P4CNT.5–0
—
Port 4 Pin Configuration Control Bits
ACON (9Dh)
ACON.5
MROM
Merge ROM
—
ACON.4
BPME
Breakpoint Mode Enable
—
ACON.3
BROM
By-Pass ROM
—
ACON.2
SA
Stack Address Mode
—
ACON.1–0
AM1–AM0
Address Mode Select Bits
P5CNT (A2h)
P5CNT.2–0
—
Port 5 Pin Configuration Control Bits
C0C (A3h)
C0C.3
CRST
CAN 0 Reset
P6CNT (B2h)
P6CNT.5–0
—
Port 6 Pin Configuration Control Bits
—
MCON.5
CAN
CMA Data Memory Assignment
—
MCON.3–0
PDCE3–PDCE0
Program/Data-Chip Enables
COR (CEh)
COR.7
IRDACK
IRDA Clock-Output Enable
—
COR.4–3
C0BPR7–C0BPR6
CAN 0 Baud Rate Prescale Bits
—
COR.2–1
COD1–COD0
CAN Clock-Output Divide Bits
—
COR.0
CLKOE
CAN Clock-Output Enable
MCON1 (D6h)
MCON1.3–0
PDCE7–PDCE4
Program/Data Chip Enable
MCON2 (D7h)
MCON2.6–4
WPR2–WPR0
Write-Protect Range Bits
MCON2.3–0
WPE3–WPE0
Write-Protect Enable Bits
WDCON (D8h)
WDCON.6
POR
Power-On Reset Flag
—
WDCON.3
WDIF
Watchdog Interrupt Flag
—
WDCON.1
EWT
Watchdog Reset Enable
—
WDCON.0
RWT
Reset Watchdog Timer
EBS (E5h)
EBS.7
FPE
Flush Filter Failed-Packet Enable
—
EBS.4–0
BS4-BS0
Buffer Size Configuration Bits
MEMORY ARCHITECTURE
The DS80C410 incorporates six internal memory areas:
256 Bytes of scratchpad (or direct) RAM
8kB of SRAM for Ethernet MAC transmit/receive buffer memory
64kB SRAM configurable as a combination of MOVX data memory and code memory
1kB SRAM configurable as extended stack memory or MOVX data memory
256 Bytes of RAM reserved for the CAN message centers (not available on the DS80C411)
64kB embedded ROM firmware
Up to 16MB of external code memory can be addressed through a multiplexed or demultiplexed 22-bit address
bus/8-bit data bus through eight available chip enables. Up to 4MB of external data memory can be accessed over
the same address/data buses through peripheral-enable signals. The DS80C410 also permits a 16MB merged
program/data memory map.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS80C411-FNY+ | 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| DS80CH11 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:System Energy Manager |
| DS80CH11+E02 | 制造商:Maxim from Components Direct 功能描述:MAXIM DS80CH11+E02 SYSTEM ENERGY MANAGERS - Trays 制造商:Maxim 功能描述:Maxim DS80CH11+E02 System Energy Managers |
| DS80CH11-E02 | 制造商:Maxim from Components Direct 功能描述:MAXIM DS80CH11-E02 SYSTEM ENERGY MANAGERS - Trays 制造商:Maxim 功能描述:Maxim DS80CH11-E02 System Energy Managers |
| DS80E100 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables |
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