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參數(shù)資料
型號(hào)： DS80C411-FNY+
廠商： Maxim Integrated Products
文件頁數(shù)： 21/102頁
文件大小： 0K
描述： IC MCU 75MHZ 16MB HP 100-LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 90
系列： 80C
核心處理器： 8051
芯體尺寸： 8-位
速度： 75MHz
連通性： 1 線，CAN，EBI/EMI，以太網(wǎng)，SIO，UART/USART
外圍設(shè)備： 電源故障復(fù)位，WDT
輸入/輸出數(shù)： 64
程序存儲(chǔ)器容量： 64KB（64K x 8）
程序存儲(chǔ)器類型： ROM
RAM 容量： 64K x 8
電壓 - 電源 (Vcc/Vdd)： 1.62 V ~ 3.6 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-LQFP
包裝： 托盤
DS80C410/DS80C411 Network Microcontrollers with Ethernet and CAN
25 of 102
OWSTP
PIN TIMING CHARACTERISTICS
(VCC3 = 3.0V to 3.6V, VCC1 = 1.8V ±10%, TA = -40°C to +85°C.) (Note 1)
PARAMETER
SYMBOL
STANDARD
OVERDRIVE
UNITS
MIN
MAX
MIN
MAX
Active Time for Presence Detect
tON1
6.4
8
0.8
1
s
Active Time for Presence Detect Recovery
tON2
8
10
8
10
s
Active Time for Write 1 Recovery (Notes 2, 3)
tON3
51.2
64
7.2
9
s
Active Time for Write 0 Recovery (Notes 2, 3)
tON4
6.4
8
0.8
1
s
Delay Time for Presence Detect
tDLY1
0.8
1
0.8
1
s
Delay Time for Presence Detect Recovery (Note 4)
tDLY2
399.2
499
31.2
39
s
Delay Time for Write 1/Write 0 Recovery
tDLY3
0.8
1
0.8
1
s
Turn-Off Time for 1-Wire Reset
tOFF1
1.6
2
1.6
2
s
Turn-Off Time for Write 1/Write 0 (Note 5)
tOFF2
0.8
1
0.8
1
s
Note 1:
AC electrical characteristics assume 50% duty cycle for the oscillator, oscillator frequency ≤ 75MHz, and are not 100% production
tested, but are guaranteed by design.
Note 2:
There is no OWSTP timing difference for sending out and receiving bits within a byte. The difference comes when the last bit of the
byte has been completely sent. At this point, the signal is either enabled continuously until the next reset or time slot begins, or
enabled only for active time write 1 or write 0.
Note 3:
When performing a read versus a write time slot, the master provides the same active time for write 1 and write 0. However, the
Schmitt-triggered input from the OW line is sensed every 1s for a high value. If OW is high, the OWSTP signal is enabled. If the OW
line is low, the OWSTP signal remains disabled until a high state is sensed. In all write time slots, a high is sensed immediately.
Note 4:
This parameter is the time delay until the master begins to monitor the OW pin level. If the line is already high, then OWSTP is
enabled. If not, it waits to enable OWSTP until the next state machine clock (1s or 50ns) after the OW line recovers.
Note 5:
The very first bit in a byte has an extended turn-off time of 4s because of the order of states that the 1-Wire master state machine
must go through.
OWSTP PIN TIMING
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參數(shù)描述
DS80C411-FNY+ 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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DS80CH11+E02 制造商:Maxim from Components Direct 功能描述:MAXIM DS80CH11+E02 SYSTEM ENERGY MANAGERS - Trays 制造商:Maxim 功能描述:Maxim DS80CH11+E02 System Energy Managers
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