參數(shù)資料
型號(hào)： DS21Q50N
英文描述： Telecommunication IC
中文描述： 通信集成電路
文件頁數(shù)： 57/99頁
文件大小： 325K
代理商： DS21Q50N
DS21Q50
Page 57 of 99
15. PER-CHANNEL LOOP BACK
The DS21Q50 has per-channel loop back capability that can operate in one of two modes, Remote Per-
Channel Loop Back or Local Per-Channel Loop Back. PCLB1/2/3/4 are used for both modes to determine
which channels will be looped back. In Remote Per-Channel Loop Back mode, PCLB1/2/3/4 will determine
which channels (if any) in the transmit direction should be replaced with the data from the receiver or in other
words, off of the E1 line. In Local Per-Channel Loop Back mode, PCLB1/2/3/4 will determine which channels
(if any) in the receive direction should be replaced with the data from the transmit. If either mode is enabled, then
transmit and receive clocks and frame syncs must be synchronized. There are no restrictions on which channels
can be looped back or on how many channels can be looped back.
Register Name:
PCLB1, PCLB2, PCLB3, PCLB4
Register Description:
PER-CHANNEL LOOPBACK REGISTERS
Register Address:
2B Hex, 2C Hex, 2D Hex, 2E Hex
Bit #
7
6
5
4
3
SYM
CH8
CH7
CH6
CH5
CH4
SYM
CH16
CH15
CH14
CH13
CH12
SYM
CH24
CH23
CH22
CH21
CH20
SYM
CH32
CH31
CH30
CH29
CH28
SYMBOLS
BIT
NAME AND DESCRIPTION
CH1 - 32
PCLB1.0 -
4.7
0 = do not loopback this channel
1 = loopback this channel
2
1
0
CH3
CH11
CH19
CH27
CH2
CH10
CH18
CH26
CH1
CH9
CH17
CH25
Per-Channel Loopback Control Bits.
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