參數(shù)資料
型號(hào): COM20019ILJP
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
中文描述: 1 CHANNEL(S), 312.5K bps, LOCAL AREA NETWORK CONTROLLER, PQCC28
封裝: PLASTIC, LCC-28
文件頁(yè)數(shù): 19/65頁(yè)
文件大?。?/td> 386K
代理商: COM20019ILJP
Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
Rev. 09-25-07
Page 26
SMSC COM20019I
DATASHEET
6.2.7
Diagnostic Status Register
The Diagnostic Status Register contains seven read-only bits which help the user troubleshoot the network
or node operation. Various combinations of these bits and the TXEN bit of the Configuration Register
represent different situations. All of these bits, except the Excessive NAcK bit and the New Next ID bit, are
reset to logic "0" upon reading the Diagnostic Status Register or upon software or hardware reset. The
EXCNAK bit is reset by the "POR Clear Flags" command or upon software or hardware reset.
The
Diagnostic Status Register defaults to the value 0000 000X upon either hardware or software reset.
6.2.8
Command Register
Execution of commands are initiated by performing microcontroller writes to this register.
Any
combinations of written data other than those listed in Table 5 are not permitted and may result in incorrect
chip and/or network operation.
6.2.9
Address Pointer Registers
These read/write registers are each 8-bits wide and are used for addressing the internal RAM. New pointer
addresses should be written by first writing to the High Register and then writing to the Low Register
because writing to the Low Register loads the address. The contents of the Address Pointer High and Low
Registers are undefined upon hardware reset. Writing to Address Pointer low loads the address.
6.2.10 Configuration Register
The Configuration Register is a read/write register which is used to configure the different modes of the
COM20019I.
The Configuration Register defaults to the value 0001 1000 upon hardware reset only.
SUBAD0 and SUBAD1 point to the selection in Register 7.
6.2.11 Sub-Address Register
The sub-address register is new to the COM20019I, previously a reserved register. Bits 2, 1 and 0 are
used to select one of the registers assigned to address 7h. SUBAD1 and SUBAD0 already exist in the
Configuration register on the COM20020B. They are exactly same as those in the Sub-Address register. If
the SUBAD1 and SUBAD0 bits in the Configuration register are changed, the SUBAD1and SUBAD0 in
the Sub-Address register are also changed. SUBAD2 is a new sub-address bit. It is used to access the 1
new Set Up register, SETUP2. This register is selected by setting SUBAD2=1. The SUBAD2 bit is cleared
automatically by writing the Configuration register.
6.2.12 Setup 1 Register
The Setup 1 Register is a read/write 8-bit register accessed when the Sub Address Bits are set up
accordingly (see the bit definitions of the Configuration Register). The Setup 1 Register allows the user to
change the network speed (data rate) or the arbitration speed independently, invoke the Receive All
feature and change the nPULSE1 driver type. The data rate may be slowed to 156.25Kbps and/or the
arbitration speed may be slowed by a factor of two. The Setup 1 Register defaults to the value 0000 0000
upon hardware reset only.
相關(guān)PDF資料
PDF描述
CP0603A2442CSTR
CP0805A0881ESTR
CP0805A1441BSTR
CP2101-GMR
CP2101
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