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參數(shù)資料
| 型號： | CLC5902VLA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 調(diào)諧器 |
| 英文描述： | Dual Digital Tuner/AGC |
| 中文描述： | 1-BAND, AUDIO TUNER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數(shù)： | 27/28頁 |
| 文件大?。?/td> | 783K |
| 代理商： | CLC5902VLA |
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1999 National Semiconductor Corporation
27
Rev. 3.05 May 27, 1999
AGC may be configured to adapt the gain during the
power ramp sequence then hold it steady afterwards by
setting AGC_FORCE low, AGC_HOLD_IC low and pro-
gramming AGC_HOLD_COUNT for the period of the
power ramp. In addition, one can provide an initial condi-
tion and set AGC_RESET_EN high to have the gain start
at a prescribed value at the beginning
of each burst. The
AGC becomes active when the
AGC_EN
pin goes low
and remains
active for AGC_HOLD_COUNT samples
after
AGC_EN
goes high. The AGC_HOLD_COUNT
can be programmed to one value during the random access
burst and a smaller value during a normal burst. Finally,
one might program a more narrow AGC loop bandwidth
during normal transmission. Just prior to the next burst
transmission from a mobile, set the initial condition to the
value read back from the AGC accumulator at the end of
the previous burst from that specific mobile. Allowing the
AGC to free run should be appropriate for most applica-
tions. If the INH_EXP bit is not set, the DVGA gain word
(
EXP
) is routed to the “FLOAT TO FIXED CON-
VERTER” in the DDCs prior to the programmable deci-
mation filter. The
EXP
signals are delayed to account for
the propagation delay of the DVGA interface and the
CLC5956 ADC. The basic AGC modes are summarized in
Table 4.
Evaluation Hardware
Evaluation boards are available to facilitate designs based
on the CLC5902:
CLC-DRCS-PCASM
The Diversity Receiver Chipset evaluation board provid-
ing a complete narrowband receiver from IF to digital
symbols.
CLC-CAPT-PCASM
A simple method for capturing output data from CLC
ADCs and the CLC5902.
SOFTWARE
Control panel software for the CLC5902 supports com-
plete device configuration on both evaluation boards.
Capture software manages the capture of data and its stor-
age in a file on a PC.
Matlab script files support data analysis: FFT, DNL, and
INL plotting.
This software and additional application information is
available on the CLC Evaluation Kit CDROM.
AGAIN
a
a. AGAIN sets the DVGA or analog gain value.
b. EXP sets the “FIXED TO FLOAT CONVERTER” or digital gain value.
c. 22-bit input to SHIFT-UP block in Figure 15 horizontally, linearized SHIFT-UP value vertically.
d. The numbers in the center of the table represent the mixer output bits. ‘L’ represents a logic low.
EXP
b
Input
c
21 20 19 18 17 16 15 14
...
8
7
6
5
4
3
2
1
0
000 = -12dB
111 = +0dB
-12dB
14
13
12
11
10
9
8
7
...
1
0
L
L
L
L
L
L
L
001 = -6dB
110 = -6dB
-12dB
14
14
13
12
11
10
9
8
...
2
1
0
L
L
L
L
L
L
010 = +0dB
101 = -12dB
-12dB
14
14
14
13
12
11
10
9
...
3
2
1
0
L
L
L
L
L
011 = +6dB
100 = -18dB
-12dB
14
14
14
14
13
12
11
10
...
4
3
2
1
0
L
L
L
L
100 = +12dB
011 = -24dB
-12dB
14
14
14
14
14
13
12
11
...
5
4
3
2
1
0
L
L
L
101 = +18dB
010 = -30dB
-12dB
14
14
14
14
14
14
13
12
...
6
5
4
3
2
1
0
L
L
110 = +24dB
001 = -36dB
-12dB
14
14
14
14
14
14
14
13
...
7
6
5
4
3
2
1
0
L
111 = +30dB
000 = -42dB
15-bit Mixer Output Alignment into the 22-bit SHIFT-UP Based On
EXP
.
d
-12dB
14
14
14
14
14
14
14
14
...
8
7
6
5
4
3
2
1
0
Table 7
相關PDF資料 |
PDF描述 |
|---|---|
| CLC5903 | Dual Digital Tuner / AGC |
| CLC5903SM | Dual Digital Tuner / AGC |
| CLC5903VLA | Dual Digital Tuner / AGC |
| CLC5955 | 11-bit, 55MSPS Broadband Monolithic A/D Converter |
| CLC5955MTDX | 11-bit, 55MSPS Broadband Monolithic A/D Converter |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC5903 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Digital Tuner / AGC |
| CLC5903CISM/NOPB | 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| CLC5903SM | 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| CLC5903SM/NOPB | 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| CLC5903VLA | 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
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