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參數(shù)資料
| 型號： | CLC5902VLA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 調(diào)諧器 |
| 英文描述： | Dual Digital Tuner/AGC |
| 中文描述： | 1-BAND, AUDIO TUNER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數(shù)： | 2/28頁 |
| 文件大?。?/td> | 783K |
| 代理商： | CLC5902VLA |
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Rev. 3.05 May 27, 1999
2
1999 National Semiconductor Corporation
Functional Description
.
The CLC5902 block diagram is shown in Figure 2. The
CLC5902 contains two identical digital down-conversion
(DDC) circuits. Each DDC accepts a 14-bit sample at up
to 52MSPS, down converts from a selected carrier fre-
quency to baseband, decimates the signal rate by a pro-
grammable factor ranging from 32 to 16384, provides
channel filtering, and outputs quadrature symbols.
A crossbar switch enables either of the two inputs or a test
register to be routed to either DDC channel. Flexible chan-
nel filtering is provided by the two programmable deci-
mating FIR filters. The final filter outputs can be
converted to a 12-bit floating point format or standard
two’s complement format. The output data is available at
both serial and parallel ports.
The CLC5902 maintains over 100 dB of spurious free
dynamic range and over 100 dB of out-of-band rejection.
This allows considerable latitude in channel filter parti-
tioning between the analog and digital domains.
The frequencies, phase offsets, and phase dither of the two
sine/cosine numerically controlled oscillators (NCOs) can
be independently specified. Both channels share the same
decimation ratio, bandwidth, filter coefficients, and input/
output formats.
Each channel has its own AGC circuit for use with nar-
rowband radio channels where most of the channel filter-
ing precedes the ADC. The AGC closes the loop around
the CLC5526 DVGA, compressing the dynamic range of
the signal into the ADC. The AGC can be configured to
operate continuously or in a gated mode. The two AGC
circuits operate independently but share the same pro-
grammed parameters and control signals.
The chip receives configuration and control information
over a microprocessor-compatible bus consisting of an 8-
bit data I/O port, an 8-bit address port, a chip enable
strobe, a read strobe, and a write strobe. The chip’s control
registers (8 bits each) are memory mapped into the 8-bit
address space of the control port.
JTAG boundary scan and on-chip diagnostic circuits are
provided to simplify system debug and test.
The CLC5902 supports 3.3V I/O. The CLC5956 ADC
outputs are compatible with the CLC5902 inputs. The
CLC5902 outputs swing to the 3.3V rail so they can be
directly connected to 5V TTL inputs if desired.
Figure 2
CLC5902 Dual Digital Tuner/AGC Block Diagram with Control Register Associations
AIN
BIN
MUX
A
MUX
B
Channel A
Tuning,
Channel Filters, and
AGC (see Figure 14)
Channel B
Tuning,
Channel Filters, and
AGC (see Figure 14)
Input Source
A_SOURCE
B_SOURCE
Output Controls
RATE
SOUT_EN
SCK_POL
SFS_POL
RDY_POL
MUX_MODE
PACKED
FORMAT
DEBUG_EN
DEBUG_TAP
Output Formatter
Floating Point:
4-bit Exponent and
8-bit Mantissa
or
32-bit Truncated or
24-bit Rounded or
16-bit Rounded or
8-bit Truncated
(see Figure 26)
Two’s Complement:
AOUT/BOUT
BOUT
SCK
SFS
RDY
POUT[15..0]
PSEL[2..0]
POUT_EN
CK
CLK
GEN
TEST_REG
Channel B Controls
GAIN_B
FREQ_B
PHASE_B
AGC_IC_B
AGC_RB_B
DITH_B
AGC_EN
Channel A Controls
GAIN_A
FREQ_A
PHASE_A
AGC_IC_A
AGC_RB_A
DITH_A
Common Channel Controls
DEC
DEC_BY_4
SCALE
EXP_INH
F1_COEFF
F2_COEFF
AGC_FORCE
AGC_RESET_EN
AGC_HOLD_IC
AGC_LOOP_GAIN
AGC_COUNT
AGC_TABLE
AGAIN[2..0]
ASTROBE
BGAIN[2..0]
BSTROBE
Microprocessor
Interface
RD
WR
CE
A[7:0]
D[7:0]
SI
MR
Sync
Logic
14
14
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLC5903 | Dual Digital Tuner / AGC |
| CLC5903SM | Dual Digital Tuner / AGC |
| CLC5903VLA | Dual Digital Tuner / AGC |
| CLC5955 | 11-bit, 55MSPS Broadband Monolithic A/D Converter |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC5903 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Digital Tuner / AGC |
| CLC5903CISM/NOPB | 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| CLC5903SM | 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| CLC5903SM/NOPB | 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| CLC5903VLA | 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
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