參數(shù)資料
型號(hào): CLC5902VLA
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 調(diào)諧器
英文描述: Dual Digital Tuner/AGC
中文描述: 1-BAND, AUDIO TUNER, PQFP128
封裝: PLASTIC, QFP-128
文件頁數(shù): 19/28頁
文件大?。?/td> 783K
代理商: CLC5902VLA
1999 National Semiconductor Corporation
19
Rev. 3.05 May 27, 1999
mitted first. When this mode is selected, the I/Q samples
are packed regardless of the state of MUX_MODE, and
the data is sent as mI/eI/eQ/mQ which allows the two
exponents to form an 8-bit word. This is shown in Figure
29(d). For all formats, once the defined length of the word
is complete, SCK stops toggling.
Parallel Outputs
Output data from the channels can also be taken from a
16-bit parallel port. A 3-bit word applied to the
POUT_SEL[2:0]
pins determines which 16-bit segment is
multiplexed to the parallel port. Table 3 defines this map-
ping. To allow for bussing of multiple chips, the parallel
port is tri-stated unless
POUT_EN
is low. The
RDY
sig-
nal indicates the start of an OSP and that new data is ready
at the parallel output. The user has one OSP to cycle
through whichever registers are needed. The RATE regis-
ter must be set so that each OSP is at least 5 SCK periods.
Parallel Port Output Numeric Formats
The I/Q samples can be rounded to 16 or 24 bits or the full
32 bit word can be read. By setting the word size to 32 bits
it is possible to read out the top 16 bits and only observe
the top 8 bits if desired. Additionally, the output samples
can be formatted as floating point numbers with an 8-bit
mantissa and a 4 bit exponent. For the fixed-point formats,
the valid bits are justified into the MSBs of the registers of
Table 3 and all other bits are set to zero. For the floating
point format, the valid bits are placed in the upper 16 bits
of the appropriate channel register using the format 0000/
eI/mI for the I samples.
SCK
SFS
AOUT
I15
I14
I1
I0
Q15
Q14
(a) UNPACKED MODE, FRAME SYNC AT THE START OF EACH WORD
SCK
SFS
AOUT
I15
I14
I1
I0
Q15
Q14
(b) PACKED MODE, ONE FRAME SYNC AT THE START OF EACH DOUBLE-WORD TRANSFER
clock stops and data is zero after transfers are complete
RDY
(c) ONE OR TWO CHANNEL MUX MODES (PACKED MODE IS ON)
SFS
AOUT
AOUT
MUX_MODE=0
MUX_MODE=1
Output Sample Period (OSP)
Q1
Q0
Q1
Q0
IA
QA
SFS
IA
QA
IB
QB
IA
QA
IB
QB
IA
QA
SCK
SFS
AOUT
mI7
eI3
eI0
eQ3
(d) FLOATING POINT FORMAT
eQ0
mQ0
mI0
mQ7
leading edge of RDY aligns with leading edge of SFS
Figure 29
Serial output formats. Refer to Figure 9 for detailed timing information
RDY is 4 CK periods wide
mI6
eI2
clock stops and data is zero after transfers are complete
clock stops and data is zero after transfers are complete
POUT_SEL
Normal Register
Contents
Floating Point
Register Contents
0
IA upper 16 bits
0000/eIA/mIA
1
IA lower 16 bits
0x0000
2
QA upper 16 bits
0000/eQA/mQA
3
QA lower 16 bits
0x0000
4
IB upper 16 bits
0000/eIB/mIB
5
IB lower 16 bits
0x0000
6
QB upper 16 bits
0000/eQB/mQB
7
QB lower 16 bits
0x0000
Table 3
Register Selection for Parallel Output
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CLC5903 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Digital Tuner / AGC
CLC5903CISM/NOPB 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
CLC5903SM 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
CLC5903SM/NOPB 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
CLC5903VLA 功能描述:上下轉(zhuǎn)換器 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128