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參數(shù)資料
| 型號： | BX80562X3210SLACU |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 266 MHz, MICROPROCESSOR, PBGA775 |
| 封裝： | LGA-775 |
| 文件頁數(shù)： | 69/96頁 |
| 文件大?。?/td> | 1398K |
| 代理商： | BX80562X3210SLACU |
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Quad-Core Intel Xeon Processor 3200 Series Datasheet
71
Land Listing and Signal Descriptions
§
TMS
Input
TMS (Test Mode Select) is a JTAG specification support signal used by debug
tools.
TRDY#
Input
TRDY# (Target Ready) is asserted by the target to indicate that it is ready to
receive a write or implicit writeback data transfer. TRDY# must connect the
appropriate pins/lands of all FSB agents.
TRST#
Input
TRST# (Test Reset) resets the Test Access Port (TAP) logic. TRST# must be
driven low during power on Reset.
VCC
Input
VCC are the power pins for the processor. The voltage supplied to these pins
is determined by the VID[7:0] pins.
VCCPLL
Input
VCCPLL provides isolated power for internal processor FSB PLLs.
VCC_SENSE
Output
VCC_SENSE is an isolated low impedance connection to processor core power
(VCC). It can be used to sense or measure voltage near the silicon with little
noise.
VCC_MB_
REGULATION
Output
This land is provided as a voltage regulator feedback sense point for VCC. It is
connected internally in the processor package to the sense point land U27 as
described in the Voltage Regulator-Down (VRD) 11.0 Processor Power
Delivery Design Guidelines For Desktop LGA775 Socket.
VID[7:0]
Output
VID[7:0] (Voltage ID) signals are used to support automatic selection of
power supply voltages (VCC). Refer to the Voltage Regulator-Down (VRD)
11.0 Processor Power Delivery Design Guidelines For Desktop LGA775 Socket
for more information. The voltage supply for these signals must be valid
before the VR can supply VCC to the processor. Conversely, the VR output
must be disabled until the voltage supply for the VID signals becomes valid.
The VID signals are needed to support the processor voltage specification
variations. See Table 2-1 for definitions of these signals. The VR must supply
the voltage that is requested by the signals, or disable itself.
VID_SELECT
Output
This land is tied high on the processor package and is used by the VR to
choose the proper VID table. Refer to the Voltage Regulator-Down (VRD) 11.0
Processor Power Delivery Design Guidelines For Desktop LGA775 Socket for
more information.
VRDSEL
Input
This input should be left as a no connect in order for the processor to boot.
The processor will not boot on legacy platforms where this land is connected
to VSS.
VSS
Input
VSS are the ground pins for the processor and should be connected to the
system ground plane.
VSSA
Input
VSSA is the isolated ground for internal PLLs.
VSS_SENSE
Output
VSS_SENSE is an isolated low impedance connection to processor core VSS. It
can be used to sense or measure ground near the silicon with little noise.
VSS_MB_
REGULATION
Output
This land is provided as a voltage regulator feedback sense point for VSS. It is
connected internally in the processor package to the sense point land V27 as
described in the Voltage Regulator-Down (VRD) 11.0 Processor Power
Delivery Design Guidelines For Desktop LGA775 Socket.
VTT
Miscellaneous voltage supply.
VTT_OUT_LEFT
VTT_OUT_RIGHT
Output
The VTT_OUT_LEFT and VTT_OUT_RIGHT signals are included to provide a
voltage supply for some signals that require termination to VTT on the
motherboard.
VTT_SEL
Output
The VTT_SEL signal is used to select the correct VTT voltage level for the
processor. This land is connected internally in the package to VTT.
Table 4-3.
Signal Description (Sheet 6 of 6)
Name
Type
Description
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