參數(shù)資料
型號(hào): BR1570
英文描述: WarpLink Reference Design Platform
中文描述: WarpLink參考設(shè)計(jì)平臺(tái)
文件頁(yè)數(shù): 17/24頁(yè)
文件大小: 492K
代理商: BR1570
WarpLink Reference Design Platform
17
For More Information On This Product,
Go to: www.freescale.com
Figure 13. Typical Clock Receiver Input Simulation
DESCRIPTION OF PASSIVE SIGNAL INTEGRITY MEASUREMENTS
TIME DOMAIN REFLECTOMETRY
TDR was used to measure the impedance profile of the WarpLink Reference Design Platform’s backplane interconnects. The impedance of
an interconnect is important to determine since impedance mismatches due to surrounding structures can cause reflections, which in turn
cause aberrations in signal fidelity. To measure the differential impedance, two signals of a pair are driven simultaneously with step
sources of equal amplitude and opposite polarity. The far ends of the lines are either open circuit or match terminated and the reflections
are sampled at the TDR heads. The impedance is then determined using both the incident and reflected wave components as an automatic
function of TDR/DSO mainframe.
DIFFERENTIAL TIME DOMAIN CROSSTALK
Crosstalk measurements were completed using the TDR step generator to perturb an aggressor line while monitoring a victim line via the
differential input channels. Crosstalk measurements are basically a form of transmission measurement, where instead of measuring at the
output ports of a given excited pair, one measures at the near- or far-end ports of a neighboring pair. Any remaining open ports are
terminated, ideally in their characteristic impedance. Such measurements will illustrate undesired signal coupling occurring between
neighboring lines or differential pairs. The crosstalk can be expressed both in terms of the voltage amplitude as well as in percentage of
the driver or receiver voltage.
Coupling the stimulus and measurement techniques of the crosstalk measurement with the signals used to generate eye patterns can
produce some interesting effects. By using a clock aggressor signal and a standard PRBS signal through the victim line, distortion can be
observed when the added signal crosstalk is present.
EYE DIAGRAMS
Eye diagrams can demonstrate the
goodness
of a component or connection path by passing a random bit stream through and monitoring
the output over a span of time. Where the
hits
take place in time and voltage, and the distribution of the hits, can determine whether the
device under test (DUT) is transmitting data that can be properly interpreted when compared to a
mask
or other criteria set in advance.
F
Freescale Semiconductor, Inc.
n
.
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