參數(shù)資料
型號: BR1570
英文描述: WarpLink Reference Design Platform
中文描述: WarpLink參考設(shè)計平臺
文件頁數(shù): 13/24頁
文件大?。?/td> 492K
代理商: BR1570
WarpLink Reference Design Platform
13
For More Information On This Product,
Go to: www.freescale.com
Table 4. Simulation Matrix Eye Pattern Parameters
Case Temperature (
°
C)
0 / 65 / 100
Supply
Voltages
±
10%
Process
Corner
Pre-Emphasis
On / Off
Data Rate
(Gbps)
Backplane
Length
(in)
Via
Type
Eye Height
(mV)
Eye Width
(ps)
Jitter (p-p)
(ps)
Within
XAUI
Mask
1
0
2.0
FF
Off
3.125
2
Full
650
275
45
Y
2
0
2.0
FF
On
3.125
2
Full
740
280
40
Y
3
0
2.0
FF
Off
3.125
20
Full
300
220
100
Y
4
0
2.0
FF
On
3.125
20
Full
450
260
60
Y
5
100
1.6
SS
Off
3.125
2
Full
360
255
65
Y
6
100
1.6
SS
On
3.125
2
Full
450
270
50
Y
7
100
1.6
SS
Off
3.125
20
Full
170
220
100
N
8
100
1.6
SS
On
3.125
20
Full
220
240
80
Y
9
100
1.6
SS
Off
3.125
20
Stub
120
190
130
N
10
100
1.6
SS
On
3.125
20
Stub
190
240
80
N
11
65
1.8
TT
Off
3.125
10
Full
370
260
60
Y
12
65
1.8
TT
On
3.125
10
Full
480
280
40
Y
13
65
1.8
TT
Off
3.125
10
Stub
280
235
85
Y
14
65
1.8
TT
On
3.125
10
Stub
440
275
45
Y
The eye parameters measured at the receiver input include eye height, eye width, peak-to-peak jitter, and XAUI mask. The precise
measurement point of the eye pattern is between the package and the silicon at the receiver input. A comparison of the odd-numbered
cases (pre-emphasis off) in Table 4 to the even-numbered cases (pre-emphasis on) shows a great improvement for all eye metrics when
pre-emphasis is engaged. The XAUI channel eye mask has been overlaid on the receiver input eye to illustrate compliance (refer to the eye
pattern plots below).
Cases 9 and 10 and 13 and 14 contain the
stub
via model. In a typical backplane system, parasitic stubs are seen for vias where a signal
traverse a via for less than the thickness of the backplane. For example, a differential pair routed on layers 5 and 6 will only pass through
approximately 40 mil of the 250-mil backplane. The remaining 210 mils becomes a parasitic capacitive stub, reducing the trace impedance,
and contributing to the degradation of the gigabit signal.
Figure 9
and 0
show examples of the simulated eye pattern for the WarpLink interconnect for cases 13 and 14. The measurement of the
eye width and peak-to-peak jitter are made at the zero crossing of the pattern and the eye height is made at the center of the eye opening.
Since this is a
zero average value
pattern, there should be no DC shift of the receiver input.
Figure 9
and 0
are typical of the improvement seen when the WarpLink transmit pre-emphasis feature is utilized. As shown in the
simulation results of Table 4, the eye height was improved by an average of 26%, the eye width improved by 10%, and the peak-to-peak
jitter improved by an average of 30%.
F
Freescale Semiconductor, Inc.
n
.
相關(guān)PDF資料
PDF描述
BR200A TRANSISTOR | BJT | NPN | 50V V(BR)CEO | 20A I(C) | TO-210AC
BR200B TRANSISTOR | BJT | NPN | 50V V(BR)CEO | 20A I(C) | TO-210AC
BR201A TRANSISTOR | BJT | NPN | 75V V(BR)CEO | 20A I(C) | TO-210AC
BR201B TRANSISTOR | BJT | NPN | 75V V(BR)CEO | 20A I(C) | TO-210AC
BR211-140AMO SINGLE BIDIRECTIONAL BREAKOVER DIODE|157V V(BO) MAX|1A I(S)|SOD-84
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
BR158 功能描述:橋式整流器 15A 800V RoHS:否 制造商:Vishay 產(chǎn)品:Single Phase Bridge 峰值反向電壓:1000 V 最大 RMS 反向電壓: 正向連續(xù)電流:4.5 A 最大浪涌電流:450 A 正向電壓下降:1 V 最大反向漏泄電流:10 uA 功率耗散: 最大工作溫度:+ 150 C 長度:30.3 mm 寬度:4.1 mm 高度:20.3 mm 安裝風(fēng)格:Through Hole 封裝 / 箱體:SIP-4 封裝:Tube
BR158L 制造商:GOOD-ARK 制造商全稱:GOOD-ARK Electronics 功能描述:SILICON BRIDGE RECTIFIERS
BR158W 功能描述:橋式整流器 15A 800V Wire Lds RoHS:否 制造商:Vishay 產(chǎn)品:Single Phase Bridge 峰值反向電壓:1000 V 最大 RMS 反向電壓: 正向連續(xù)電流:4.5 A 最大浪涌電流:450 A 正向電壓下降:1 V 最大反向漏泄電流:10 uA 功率耗散: 最大工作溫度:+ 150 C 長度:30.3 mm 寬度:4.1 mm 高度:20.3 mm 安裝風(fēng)格:Through Hole 封裝 / 箱體:SIP-4 封裝:Tube
BR15A 制造商:Cooper Wiring Devices 功能描述:
BR15A601 制造商:Veeder-Root Company 功能描述: