參數(shù)資料
型號(hào)： AK4673EG
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
中文描述： 立體聲編解碼器麥克風(fēng)/惠普- AMP及觸摸屏控制器
文件頁(yè)數(shù)： 95/107頁(yè)
文件大?。?/td> 1171K
代理商： AK4673EG
[AK4673]
MS0670-E-00
2007/09
- 95 -
1.
Grounding and Power Supply Decoupling
The AK4673 requires careful attention to power supply and grounding arrangements. AVDD, DVDD, TVDD1, TVDD2,
HVDD and TSVDD are usually supplied from the system’s analog supply. If AVDD, DVDD, TVDD1, TVDD2, HVDD
and TSVDD are supplied separately, the power-up sequence is not critical. The PDN pin should be held to “L” upon
power-up. The PDN pin should be set to “H” after all power supplies are powered-up.
In case that the pop noise should be avoided at line output and headphone output, the AK4673 should be operated by the
following recommended power-up/down sequence.
1)
Power-up
-
The PDN pin should be held to “L” upon power-up. The AK4673 should be reset by bringing the PDN pin “L” for
150ns or more.
-
In case that the power supplies are separated in two or more groups, the power supply including TVDD1 and TVDD2
should be powered ON at first. Regarding the relationship between DVDD and HVDD, the power supply including
DVDD should be powered ON prior to the power supply including HVDD.
2)
Power-down
-
Each power supplies should be powered OFF after the PDN pin is set to “L”.
-
In case that the power supplies are separated in two or more groups, the power supply including TVDD1 and TVDD2
should be powered OFF at last. Regarding the relationship between DVDD and HVDD, the power supply including
HVDD should be powered OFF prior to the power supply including DVDD.
VSS1, VSS2 and VSS3 of the AK4673 should be connected to the analog ground plane. System analog ground and digital
ground should be connected together near to where the supplies are brought onto the printed circuit board. Decoupling
capacitors should be as near to the AK4673 as possible, with the small value ceramic capacitor being the nearest.
2. Voltage Reference
VCOM is a signal ground of this chip. A 2.2
μ
F electrolytic capacitor in parallel with a 0.1
μ
F ceramic capacitor attached
to the VCOM pin eliminates the effects of high frequency noise. No load current may be drawn from the VCOM pin. All
signals, especially clocks, should be kept away from the VCOM pin in order to avoid unwanted coupling into the
AK4673.
3. Analog Inputs
The Mic, Line and MIN inputs are single-ended. The input signal range scales with nominally at 0.06 x AVDD Vpp(typ)
@MGAIN1-0 bits = “01”, 0.03 x AVDD Vpp(typ) @MGAIN1-0 bits = “10”, 0.015 x AVDD Vpp(typ) @MGAIN1-0
bits = “11” or 0.6 x AVDD Vpp(typ) @MGAIN1-0 bits = “00” for the Mic/Line input and 0.6 x AVDD Vpp (typ) for the
MIN input, centered around the internal common voltage (0.45 x AVDD). Usually the input signal is AC coupled using a
capacitor. The cut-off frequency is fc = 1/ (2
π
RC). The AK4673 can accept input voltages from VSS1 to AVDD.
4. Analog Outputs
The input data format for the DAC is 2’s complement. The output voltage is a positive full scale for 7FFFH(@16bit) and
a negative full scale for 8000H(@16bit). The ideal output is VCOM voltage for 0000H(@16bit). Stereo Line Output is
centered at 0.45 x AVDD. The Headphone-Amp output is centered at HVDD/2.
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