參數(shù)資料
型號(hào)： AK4673EG
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
中文描述： 立體聲編解碼器麥克風(fēng)/惠普- AMP及觸摸屏控制器
文件頁(yè)數(shù)： 27/107頁(yè)
文件大?。?/td> 1171K
代理商： AK4673EG
[AK4673]
MS0670-E-00
2007/09
- 27 -
AUDIO OPERATION OVERVIEW
■
System Clock
There are the following four clock modes to interface with external devices (
Table 2
and
Table 3
).
Mode
PLL Master Mode (
Note 38
)
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
PLL Slave Mode 2
(PLL Reference Clock: LRCK or BICK pin)
EXT Slave Mode
EXT Master Mode
Note 38. If M/S bit = “1”, PMPLL bit = “0” and MCKO bit = “1” during the setting of PLL Master Mode, the invalid
clocks are output from MCKO pin when MCKO bit is “1”.
Table 2. Clock Mode Setting (x: Don’t care)
Mode
MCKO bit
0
PLL Master Mode
1
PMPLL bit
1
M/S bit
1
PLL3-0 bits
See
Table 5
Figure
Figure 18
1
0
See
Table 5
Figure 19
1
0
See
Table 5
Figure 20
Figure 21
Figure 22
Figure 23
0
0
0
1
x
x
MCKO pin
“L”
Selected by
PS1-0 bits
“L”
Selected by
PS1-0 bits
MCKI pin
BICK pin
Output
(Selected by
BCKO bit)
LRCK pin
Selected by
PLL3-0 bits
Output
(1fs)
0
PLL Slave Mode
(PLL Reference Clock: MCKI pin)
1
Selected by
PLL3-0 bits
Input
(
≥
32fs)
Input
(1fs)
PLL Slave Mode
(PLL Reference Clock: LRCK or BICK pin)
0
“L”
GND
Input
(Selected by
PLL3-0 bits)
Input
(
≥
32fs)
Output
(Selected by
BCKO bit)
Input
(1fs)
EXT Slave Mode
0
“L”
Selected by
FS1-0 bits
Input
(1fs)
EXT Master Mode
0
“L”
Selected by
FS1-0 bits
Output
(1fs)
Table 3. Clock pins state in Clock Mode
■
Master Mode/Slave Mode
The M/S bit selects either master or slave mode. M/S bit = “1” selects master mode and “0” selects slave mode. When the
AK4673 is power-down mode (PDN pin = “L”) and exits reset state, the AK4673 is slave mode. After exiting reset state,
the AK4673 goes to master mode by changing M/S bit = “1”.
When the AK4673 is used in master mode, LRCK and BICK pins are a floating state until M/S bit becomes “1”. LRCK
and BICK pins of the AK4673 should be pulled-down or pulled-up by the resistor (about 100k
Ω
) externally to avoid the
floating state.
M/S bit
Mode
0
Slave Mode
1
Master Mode
Table 4. Select Master/Slave Mode
(default)
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