參數(shù)資料
型號(hào)： AK4516AVF
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： 3V 16BIT ADC&DAC WITH BUILT-IN PGA
中文描述： 3V的16位ADC
文件頁(yè)數(shù)： 30/39頁(yè)
文件大?。?/td> 355K
代理商： AK4516AVF
ASAHI KASEI
[AK4516A]
M0026-E-00
1998/08
- 30 -
LMAT2-0: Auto Limitter ATT Step
During the auto limitter operation, when either Lch or Rch exceeds the auto limitter detection level set
by LMTH1-0, the number of steps attenuated from current IPGA value is set. For example, when the
current IPGA value is 68H in the state of LMAT2-0="111", it becomes IPGA=60H by the auto limitter
operation, the input signal level is attenuated by 4dB (=0.5dB x 8).
Auto limitter operation period is the constant period by setting LTM1-0 at ZELM="1", it is the different
period by the input signal at ZELM="0". (depend on zero crossing detection period)
When the attenuation value exceeds IPGA="00"(MUTE), it clips to "00".
LMAT2
0
0
0
0
1
1
1
1
Table 10 . Auto Limitter ATT Step Setting
LMAT1
0
0
1
1
0
0
1
1
LMAT0
0
1
0
1
0
1
0
1
ATT STEP
1
2
3
4
5
6
7
8
RESET
These bits are reset by PD pin="L", then inhibits writing to these bits.
Input Analog PGA Control
Addr Register Name
0AH Input PGA Control Lch
0BH Input PGA Control Rch
D7
D6
D5
D4
D3
D2
D1
D0
LCDET
LCDET IPGR6
RD
1
IPGL6
IPGL5
IPGR5
IPGL4
IPGR4
IPGL3
IPGR3
R/W
30H
IPGL2
IPGR2
IPGL1
IPGR1
IPGL0
IPGR0
R/W
RESET
LCDET: Auto Limitter and Auto Recovery detection Flag(refer to Figure 7 and Figure 9 )
0: Updating IPGA value by uP writing at the semi-auto mode and the auto limitter or the auto
recovery operation.
1: Complete the auto recovery operation or the auto limitter operation. Complete updating
IPGA value by uP writing at semi-auto mode. (RESET)
This flag(LCDET) always become "1" at manual mode(LMTE=RCVE="1"). The LCDET in
0AH and 0BH shows the same value.
This flag is "0" during initialization after exiting power-down mode by
PD
pin.
During the semi-auto mode operation, if LMTE is set "0" during the auto limitter operation or
the update of the IPGA value by uP LCDET becomes "1" after the max "1" ATT/GAIN
operation is completed by internal state.
During the full-auto-mode operation, if LMTE&RCVE are set "0" during the full-auto mode
operation, LCDET becomes "1" after the max "1" ATT/GAIN operation is completed by
internal state.
In case of changing the registers relative to the semi-auto mode and the full-auto mode,
these registers should be changed after writing LMTE="0"(at the semi-auto mode) or
LMTE=RCVE="0" (at the full-auto mode) and then confirming LCDET="1".
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