參數(shù)資料
型號(hào): AK4516AVF
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 3V 16BIT ADC&DAC WITH BUILT-IN PGA
中文描述: 3V的16位ADC
文件頁數(shù): 22/39頁
文件大?。?/td> 355K
代理商: AK4516AVF
ASAHI KASEI
[AK4516A]
M0026-E-00
1998/08
- 22 -
Mode Control 1
Addr
01H Mode Control 1
Register Name
D7
0
D6
0
D5
0
D4
0
D3
PM3
D2
PM2
D1
PM1
D0
PM0
R/W
RESET
R/W
0
0
0
0
0
1
1
1
PM3-0: Power Management (0: Power Down, 1:Power Up)
PM0: Mixer, PGA input, Auto Limitter and Auto Recovery power control.
PM1: Power control of ADC
PM2: Power control of DAC
PM3: Used both as power control of analog loopback circuit and as selection of MUX.
(0: DAC, 1:Analog loopback)
PM0-3 can be partially powered-down by ON/OFF of PM0-3. When
PD
pin goes "L",
all the circuit in AK4516A can be powered-down regardless of PM0-3.
When PM0-3 go all "0", all the circuits in AK4516A can be also powered-down.
When PM3 goes "1", input for output-AMP is selected to analog loopback circuit from
DAC output.
Output MUX and AMP are powered-down when
PD
="L" or PM2=PM3="0". Refer to
Figure 11 .
The loopback output and the MUX selecting DAC output is a MIXER with the switch in
practice. Therefore, when both PM2 and PM3 select ON, the analog loopback signal
and DAC output are mixed by Gain 1.
Except the case of PM0=PM1=PM2=PM3="0" or
PD
pin="L", MCLK, BCLK, LRCK
should not be stopped.
When the input PGA and MUX are powered-down by PM0-3 or
PD
pin, the output of
AMP becomes Hi-Z(floating).
This register is reset by the
PD
pin="L", then inhibits writing to this register.
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