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參數(shù)資料
| 型號： | AK4516AVF |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 3V 16BIT ADC&DAC WITH BUILT-IN PGA |
| 中文描述： | 3V的16位ADC |
| 文件頁數(shù)： | 29/39頁 |
| 文件大小： | 355K |
| 代理商： | AK4516AVF |
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ASAHI KASEI
[AK4516A]
M0026-E-00
1998/08
- 29 -
Auto Limitter Control
During the auto limitter operation, when either Lch or Rch exceed auto limitter detection level (LMTH1-0),
IPGA value is attenuated by auto limitter ATT step (LMAT1-0) automatically. Then the IPGA value is changed
commonly for L/R channels. In this operation, either zero crossing detection with timeout or immediate
change is selected by ZELM. Timeout period and update period are set by LTM1-0 (refer to Table 6 ). The
operation for attenuation is done continuously until the input signal level becomes LMTH1-0 or less. Unless
LMTE is set "1" after finishing operation for attenuation, this operation for attenuation repeats when input
signal level exceeds LMTH1-0 again. IPGA value of register is always written to current value in this mode
automatically, the operation for attenuation always starts from current IPGA value.
When the operation for attenuation is completed after the input signal becomes LMTH1-0 or less, auto
limitter detection flag(LCDET) becomes "1". This flag become "0" when the input signal exceeds LMTH1-0
again and the AK4516A enters the auto limitter operation.
During the auto limitter operation (LCDET=0), IPGA is changed according to the value set by the auto
limitter operation. Therefore, uP writing operation is ignored.
During semi-auto mode and after completing auto limitter operation(LCDET="1"), IPGA is changed
according to the value written by uP
Addr Register Name
09H Auto LMT&RCV Control
D7
D6
RCV
R/W
0
D5
0
RD
0
D4
D3
D2
D1
D0
LMTE
R/W
0
LMTH1 LMTH0 LMAT2 LMAT1 LMAT0
R/W
R/W
R/W
1
1
0
R/W
RESET
R/W
0
R/W
0
LMTE: Auto Limitter Enable Flag
0: Auto limitter operation OFF (RESET)
1: Auto limitter operation ON
RCVE: Auto Recovery Enable Flag
0: Auto recovery operation OFF(RESET)
1: Auto recovery operation ON.
This bit is only available at LMTE="1". When LMTE is "0" , auto recovery operation becomes
"OFF".
The change of operation mode by LMTE and RCVE bits always needs to control via manual-mode, between
the semi-auto mode and the full-auto mode should not be changed.
IPGA value of each channel should be equal value before entering the semi-auto mode and the full-auto
mode. LRGA should be set "1" during the semi-auto mode and writing operation by uP should always write
equal value to each channel.
LMTH1-0:Auto Limitter Detection Level / Auto Recovery Waiting Counter Reset Level
LMTH1
0
0
1
1
LMTH0
0
1
0
1
Table 9 . Auto Limitter Detection Level / Auto Recovery waiting Counter Reset Level
Auto Limitter Detection Level
ADC Input
≥
-8.0dB
ADC Input
≥
-6.0dB
ADC Input
≥
-4.0dB
ADC Input
≥
-2.0dB
Auto Recovery Waiting Counter Reset Level
-8.0dB>ADC Input
≥
-10.0dB
-6.0dB>ADC Input
≥
-8.0dB
-4.0dB>ADC Input
≥
-6.0dB
-2.0dB>ADC Input
≥
-4.0dB
(LMTJ1=LMTH0="0"@RESET)
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