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參數(shù)資料
| 型號(hào)： | AK4516AVF |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 3V 16BIT ADC&DAC WITH BUILT-IN PGA |
| 中文描述： | 3V的16位ADC |
| 文件頁數(shù)： | 15/39頁 |
| 文件大?。?/td> | 355K |
| 代理商： | AK4516AVF |
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ASAHI KASEI
[AK4516A]
M0026-E-00
1998/08
- 15 -
INIT:
Initializing. At this time, ZFIPL and ZFIPR are "0". When these flags becomes "1", INIT
process has completed.
Power-down state. ADC is output "0", analog output of DAC goes floating.
INIT-1: Initializing all registers.
INIT-2: Initializing read only registers in control registers.
Inhibit-1: Inhibits writing and reading to all control registers.
Inhibit-2: Enable writing to control registers except "Mode Control 1 (01H)" register.
Inhibit-3: Enable reading from control registers.
Inhibit-4: Enable writing to only "Mode Control 1 (01H)" register of the control registers.
Note: Please refer to "explanation of register" about the condition of each register.
PD:
1
{
Digital output corresponding to analog input and analog output corresponding to digital input have the
group delay(GD).
2
{
If the analog signal does not be input, the digital outputs have the offset to the op-amp of input and some
offset error of the internal ADC.
3
{
A few noise occurs at the "
↓↑
" of
PD
signal.
Please mute the analog output externally if the noise influences the system application.
4
{
When the external clocks are stopped, the AK4516A should be in the power-down mode.
Figure 6 .Power-up/Power-down Timing Example
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