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參數(shù)資料
| 型號： | AK4516AVF |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 3V 16BIT ADC&DAC WITH BUILT-IN PGA |
| 中文描述： | 3V的16位ADC |
| 文件頁數(shù)： | 25/39頁 |
| 文件大?。?/td> | 355K |
| 代理商： | AK4516AVF |
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ASAHI KASEI
[AK4516A]
M0026-E-00
1998/08
- 25 -
Zero Cross & Timer Control
Addr Register Name
03H Zero Cross & Timer Control
R/W
RESET
LRGA: Selects the method of writing to IPGA
0: Independent data can be written to IPGA and IPGR.
1: Common data can be written to IPGL and IPGR.
In this case, when a data is written to IPGL, the same data is also written to IPGR. When a
data is written to IPGR, a data is only written to IPGR. When IPGL value differs from IPGR
value, IPGL and IPGR values can be set by a common data after writing IPGL value at
LRGA="1". (RESET)
GSEL:Selects input gain (set a common Lch and Rch)
0: LINE
1: MIC (RESET)
Even if LINE and MIC are the same data value, both gain values are different.
NRTM1-0: Zero crossing timeout at writing operation by uP and auto recovery operation.
Set-up zero crossing timeout at writing operation by uP and the auto recovery operation. The
writing operation by uP and the auto recovery operation set up in common. In case of the
auto limitter operation, zero crossing operation is set by different bits(LTM1-0).
D7
D6
D5
D4
D3
D2
LTM1
R/W
1
D1
LTM0
R/W
0
D0
LRGA
R/W
1
GSEL
R/W
1
NRTM1 NRTM0 ZENM
R/W
R/W
1
0
ZELM
R/W
0
R/W
0
Zero crossing timeout(ZENM="1")
48kHz
44.1kHz
513/fs
10.7ms
1025/fs
21.4ms
2049/fs
42.7ms
4097/fs
85.4ms
NRTM1
NRTM0
32kHz
16.0ms
32.0ms
64.0ms
128.0ms
0
0
1
1
0
1
0
1
11.6ms
23.2ms
46.5ms
92.9ms
RESET
Table 5 . Zero crossing timeout at uP writing operation and auto recovery operation.
(NRTM1="1", NRTM0="0" at RESET)
ZENM: Enables zero crossing detection at uP WRITE operation or auto recovery operation
(0: Disable, 1: Enable)
1: When IPGA of each L/R channels do zero crossing or timeout independently, the IPGA
value is changed by uP WRITE operation or auto recovery operation.
0: IPGA is changed immediately.
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