參數(shù)資料
型號(hào)： AK4371
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： DAC with built-in PLL & HP-AMP
中文描述： DAC，帶有內(nèi)置的鎖相環(huán)
文件頁(yè)數(shù)： 5/62頁(yè)
文件大小： 842K
代理商： AK4371
[AK4371]
MS0596-E-00
2007/04
- 5 -
PIN/FUNCTION
No. Pin Name
1
SDATA
2
BICK
3
LRCK
4
MCKI
5
DVDD
6
PVDD
I/O
I
I/O
I/O
I
-
-
Function
Audio Serial Data Input Pin
Audio Serial Data Clock Pin
Input / Output Channel Clock Pin
External Master Clock Input Pin
Digital Power Supply Pin, 1.6
～
3.6V
Power Supply for PLL, 1.6
～
3.6V. Normally connected to AVDD.
Output for Loop Filter of PLL Circuit
This pin should be connected to VSS3 with one resistor and one capacitor in series.
Ground Pin
Ground Pin
Master Clock Output Pin
Control Data Input/Output Pin (I2C mode : I2C pin = “H”)
Control Data Input Pin (3-wire serial mode : I2C pin = “L”)
Control Data Clock Pin (I2C mode : I2C pin = “H”)
Control Data Clock Pin (3-wire serial mode : I2C pin = “L”)
Chip Address 0 Select Pin (I2C mode : I2C pin = “H”)
Chip Select Pin (3-wire serial mode : I2C pin = “L”)
Power-down & Reset
When “L”, the AK4371 is in power-down mode and is held in reset.
The AK4371 should always be reset upon power-up.
Control Mode Select Pin
“H”: I
2
C Bus, “L”: 3-wire Serial
Mute Time Constant Control pin
Connected to VSS1 pin with a capacitor for mute time constant.
Mono Signal Output Pin
Lch Stereo Line Output Pin
Rch Stereo Line Output Pin
Reference Voltage Output Pin
Normally connected to VSS1 pin with a 0.22
μ
F electrolytic capacitor.
Common Voltage Output Pin
Normally connected to VSS1 pin with a 2.2
μ
F electrolytic capacitor.
Analog Power Supply Pin, 1.6
～
3.6V
Power Supply Pin for Headphone Amp, 1.6
～
3.6V
Ground Pin
Rch Headphone Amp Output
Lch Headphone Amp Output
Rch Analog Input 2 Pin
Lch Analog Input 2 Pin
Rch Analog Input 3 Pin
Lch Analog Input 3 Pin
Rch Analog Input 1 Pin (LDIF bit =“0” : Single-ended Input)
Positive Line Input Pin (LDIF bit =“1” : Full-differential Input)
Rch Analog Input 1 Pin (LDIF bit =“0” : Single-ended Input)
Negative Line Input Pin (LDIF bit =“1” : Full-differential Input )
Note 1. All digital input pins (I2C, SDA/CDTI, SCL/CCLK, CAD0/CSN, SDATA, LRCK, BICK, MCKI, PDN) must not
be left floating. MCKI pin can be left floating only when PDN pin = “L”.
7
VCOC
O
8
9
10
VSS2
VSS3
MCKO
SDA
CDTI
SCL
CCLK
CAD0
CSN
-
-
O
I/O
I
I
I
I
I
11
12
13
14
PDN
I
15
I2C
I
16
MUTET
O
17
18
19
MOUT
LOUT
ROUT
O
O
O
20
VREF
O
21
VCOM
O
22
23
24
25
26
27
28
29
30
AVDD
HVDD
VSS1
HPR
HPL
RIN2
LIN2
RIN3
LIN3
RIN1
IN+
LIN1
IN
-
-
-
O
O
I
I
I
I
I
I
I
I
31
32
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