參數(shù)資料
型號: ADV7344BSTZ
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs
中文描述: SERIAL INPUT LOADING, 14-BIT DAC, PQFP64
封裝: ROHS COMPLIANT, MS-026BCD, LQFP-64
文件頁數(shù): 79/88頁
文件大?。?/td> 1078K
代理商: ADV7344BSTZ
ADV7344
Rev. 0 | Page 79 of 88
Cb
PIXEL
DATA
HSYNC
VSYNC
PAL = 132 × CLOCK/2
NTSC = 122 × CLOCK/2
PAL = 864 × CLOCK/2
NTSC = 858 × CLOCK/2
Cb
Y
Y
Cr
0
Figure 110. SD Timing Mode 2 Odd-to-Even Field Transition (Master/Slave)
Mode 3—Master/Slave Option (Subaddress 0x8A = X X X X X 1 1 0 or X X X X X 1 1 1)
In this mode, the ADV7344 accepts or generates horizontal sync and odd/even field signals. When HSYNC is high, a transition of the
field input indicates a new frame, that is, vertical retrace. The ADV7344 automatically blanks all normally blank lines as per CCIR-624.
HSYNC and VSYNC are output in master mode and input in slave mode on the S_VSYNC and S_VSYNC pins, respectively.
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
283
284
285
ODD FIELD
EVEN FIELD
DISPLAY
DISPLAY
VERTICAL BLANK
522
523
524
525
9
10
11
20
21
22
DISPLAY
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
HSYNC
FIELD
HSYNC
FIELD
8
7
6
5
4
3
2
1
0
Figure 111. SD Timing Mode 3, NTSC
622
623
624
625
5
6
21
22
23
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
FIELD
DISPLAY
309
310
311
312
313
314
315
316
317
318
319
334
335
336
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
FIELD
DISPLAY
320
4
3
2
1
7
HSYNC
HSYNC
0
Figure 112. SD Timing Mode 3, PAL
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