參數(shù)資料
型號(hào)： ADV7344BSTZ
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs
中文描述： SERIAL INPUT LOADING, 14-BIT DAC, PQFP64
封裝： ROHS COMPLIANT, MS-026BCD, LQFP-64
文件頁數(shù)： 59/88頁
文件大小： 1078K
代理商： ADV7344BSTZ
ADV7344
Rev. 0 | Page 59 of 88
f
e
d
a
b
c
1
R4
R2
CH1
500mV
REF A
M 4.00μs
9.99978ms
CH1
ALL FIELDS
500mV 4.00μs
Figure 73. ED/ HD Sharpness Filter Control with Different Gain Settings for ED/HD Sharpness Filter Gain Values
1
R2
R1
1
CH1
500mV
REF A
M 4.00μs
9.99978ms
CH1
ALL FIELDS
500mV 4.00μs
1
0
ED/HD SHARPNESS FILTER AND ADAPTIVE FILTER
APPLICATION EXAMPLES
Sharpness Filter Application
The ED/HD sharpness filter can be used to enhance or
attenuate the Y video output signal. The register settings in
Table 47 were used to achieve the results shown in Figure 73.
Input data was generated by an external signal source.
Table 47. ED/HD Sharpness Control
Subaddress
0x00
0x01
0x02
0x30
0x31
0x40
0x40
0x40
0x40
0x40
0x40
Register Setting
0xFC
0x10
0x20
0x00
0x81
0x00
0x08
0x04
0x40
0x80
0x22
Reference
1
a
b
c
d
e
f
1
See Figure 73.
Adaptive Filter Control Application
The register settings in Table 48 are used to obtain the results
shown in Figure 75, that is, to remove the ringing on the input
Y signal, as shown in Figure 74. Input data is generated by an
external signal source.
Table 48. Register Settings for Figure 75
Subaddress
0x00
0x01
0x02
0x30
0x31
0x35
0x40
0x58
0x59
0x5A
0x5B
0x5C
0x5D
Register Setting
0xFC
0x38
0x20
0x00
0x81
0x80
0x00
0xAC
0x9A
0x88
0x28
0x3F
0x64
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