參數(shù)資料
型號: ADV7344BSTZ
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs
中文描述: SERIAL INPUT LOADING, 14-BIT DAC, PQFP64
封裝: ROHS COMPLIANT, MS-026BCD, LQFP-64
文件頁數(shù): 66/88頁
文件大?。?/td> 1078K
代理商: ADV7344BSTZ
ADV7344
Rev. 0 | Page 66 of 88
0
–80
–70
–60
–50
–40
–30
–20
–10
0
–30
–60
–90
–120
–150
–180
–210
–240
1M
10M
100M
FREQUENCY (Hz)
CIRCUIT FREQUENCY RESPONSE
1G
GROUP DELAY (Seconds)
PHASE (Degrees)
MAGNITUDE (dB)
21n
18n
15n
12n
9n
6n
3n
0
24n
G
0
Figure 87. Output Filter Plot for SD, 16× Oversampling
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
1M
10M
100M
1G
FREQUENCY (Hz)
CIRCUIT FREQUENCY RESPONSE
MAGNITUDE (dB)
GROUP DELAY (Seconds)
PHASE
(Degrees)
G
320
240
160
80
0
–80
–160
–240
480
400
14n
12n
10n
8n
6n
4n
2n
0
18n
16n
0
Figure 88. Output Filter Plot for ED, 8× Oversampling
0
–50
1
FREQUENCY (MHz)
CIRCUIT FREQUENCY RESPONSE
G
P
10
100
–10
–20
–30
–40
200
–200
120
40
–40
–120
GROUP DELAY (Seconds)
PHASE
(Degrees)
MAGNITUDE (dB)
0
Figure 89. Output Filter Plot for HD, 4× Oversampling
PRINTED CIRCUIT BOARD (PCB) LAYOUT
The ADV7344 is a highly integrated circuit containing both
precision analog and high speed digital circuitry. It has been
designed to minimize interference effects on the integrity of the
analog circuitry by the high speed digital circuitry. It is
imperative that these same design and layout techniques be
applied to the system-level design so that optimal performance
is achieved.
The layout should be optimized for lowest noise on the
ADV7344 power and ground planes by shielding the digital
inputs and providing good power supply decoupling.
It is recommended to use a 4-layer printed circuit board with
ground and power planes separating the signal trace layer and
the solder side layer.
Component Placement
Component placement should be carefully considered to
separate noisy circuits, such as clock signals and high speed
digital circuitry from analog circuitry.
The external loop filter components and components connected
to the COMP, V
REF
, and R
SET
pins should be placed as close as
possible to and on the same side of the PCB as the ADV7344.
Adding vias to the PCB to get the components closer to the
ADV7344 is not recommended.
It is recommended that the ADV7344 be placed as close as
possible to the output connector, with the DAC output traces as
short as possible.
The termination resistors on the DAC output traces should be
placed as close as possible to and on the same side of the PCB as
the ADV7344. The termination resistors should overlay the
PCB ground plane.
External filter and buffer components connected to the DAC
outputs should be placed as close as possible to the ADV7344 to
minimize the possibility of noise pickup from neighboring
circuitry, and to minimize the effect of trace capacitance on
output bandwidth. This is particularly important when
operating in low drive mode (R
SET
= 4.12 kΩ, R
L
= 300 Ω).
Power Supplies
It is recommended that a separate regulated supply be provided
for each power domain (V
AA
, V
DD
, V
DD_IO
, and PV
DD
). For
optimal performance, linear regulators rather than switch mode
regulators should be used. If switch mode regulators must be
used, care must be taken with regard to the quality of the output
voltage in terms of ripple and noise. This is particularly true for
the V
AA
and PV
DD
power domains. Each power supply should be
individually connected to the system power supply at a single
point through a suitable filtering device, such as a ferrite bead.
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