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ADV7344
TYPICAL APPLICATION CIRCUIT
Rev. 0 | Page 68 of 88
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
S0
S1
S2
S3
S4
S5
S6
S7
S8
S9
DGND
DGND
PGND
PGND
0.1μF
GND_IO
0.01μF
GND_IO
33μF
GND_IO
FERRITE BEAD
10μF
GND_IO
FERRITE BEAD
V
DD_IO
V
DD_IO
POWER
SUPPLY
DECOUPLING
0.1μF
PGND
0.01μF
PGND
33μF
PGND
FERRITE BEAD
10μF
PGND
PV
DD
(1.8V)
PV
POWER
SUPPLY
DECOUPLING
0.1μF
AGND
0.01μF
AGND
33μF
AGND
FERRITE BEAD
10μF
AGND
V
AA
V
POWER
SUPPLY
DECOUPLING
0.1μF
DGND
0.01μF
DGND
33μF
AGND
10μF
DGND
V
DD
(1.8V)
V
POWER SUPPLY
DECOUPLING FOR
EACH POWER PIN
V
D
P
D
V
A
V
D
ADV7344
1.235V
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
S_HSYNC
S_VSYNC
P_HSYNC
P_VSYNC
P_BLANK
CLKIN_A
CLKIN_B
AGND
AGND
DGND
DGND
GND_IO
GND_IO
V
REF
AD1580
V
AA
1.1k
OPTIONAL. IF THE INTERNAL VOLTAGE
SHOULD BE CONNECTED FROM V
REF
TO V
AA
.
0.1μF
R
SET1
R
SET2
AGND
4.12k
510
75
DAC 4
AGND
300
510
AGND
510
+
–
+V
–V
DAC 4
DAC 5
DAC 5
DAC 6
DAC 6
COMP1
COMP2
V
AA
2.2nF
V
AA
2.2nF
EXT_LF1
EXT_LF1
SDA/SCLK
SCL/MOSI
SFL/MISO
ALSB/SPI_SS
PIXEL PORT INPUTS
CONTROL
INPUTS/OUTPUTS
CLOCK INPUTS
MPU PORT
INPUTS/OUTPUTS
DGND
V
D
EXTERNAL LOOP FILTER
PV
DD
LOOP FILTER COMPONENTS
OPTIONAL LPF
AGND
NOTES
1. FOR OPTIMUM PERFORMANCE, EXTERNAL COMPONENTS CONNECTED
TO THE COMP, R
, V
AND DAC OUTPUT PINS SHOULD BE LOCATED
CLOSE TO AND ON THE SAME SIDE OF THE PCB AS THE ADV7344.
2. WHEN OPERATING IN I
2
C MODE, THE I
2
C DEVICE ADDRESS IS
CONFIGURABLE USING THE ALSB/SPI_SS PIN:
ALSB/SPI_SS = 0,I
2
C DEVICE ADDRESS = 0xD4
ALSB/SPI_SS = 1,I
2
C DEVICE ADDRESS = 0xD6
3. THE RESISTORS CONNECTED TO THE R
SET
PINS SHOULD HAVE A 1%
TOLERANCE.
AD8061
75
AGND
300
510
AGND
510
+
–
+V
–V
OPTIONAL LPF
AD8061
75
AGND
300
510
AGND
510
+
–
+V
–V
OPTIONAL LPF
AD8061
DACs 1 TO 3 LOW DRIVE OPTION
DAC 1
DAC 2
DAC 3
DAC 1
DAC 3
R
SET1
AGND
4.12k
75
AGND
300
510
AGND
510
+
–
+V
–V
OPTIONAL LPF
AD8061
75
AGND
300
510
AGND
510
+
–
+V
–V
OPTIONAL LPF
AD8061
75
AGND
300
510
AGND
510
+
–
+V
–V
OPTIONAL LPF
AD8061
DAC 2
12nF
150nF
170
12nF
150nF
170
1μF
AGND
DAC 1
DAC 2
DAC 3
AGND
75
AGND
75
AGND
75
DAC 1
DAC 2
DAC 3
DACs 1 TO 3 FULL DRIVE OPTION
OPTIONAL LPF
OPTIONAL LPF
OPTIONAL LPF
0
Figure 90. ADV7344 Typical Application Circuit