參數(shù)資料
型號： ADS6224IRGZ25
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48
封裝： 7 X 7 MM, GREEN, PLASTIC, VQFN-48
文件頁數(shù)： 58/73頁
文件大?。?/td> 3182K
代理商： ADS6224IRGZ25
www.ti.com
OUTPUT TIMINGS AT LOWER SAMPLING FREQUENCIES
SLAS543A – MAY 2007 – REVISED SEPTEMBER 2007
Setup, hold and other timing parameters are specified across sampling frequencies and for each type of output
interface in the tables below.
Table 29 to Table 32: Typical values are at 25
°C, min and max values are across the full temperature range T
MIN
= –40
°C to T
MAX = 85°C, AVDD = LVDD = 3.3 V, CL = 5 pF , IO = 3.5 mA, RL = 100 , no internal termination,
unless otherwise noted.
Timing parameters are ensured by design and characterization and not tested in production.
Ts = 1/ Sampling frequency = 1/Fs
Table 28. Clock Propagation Delay and Serializer Latency for Different Interface Options
SERIALIZER LATENCY (1)
INTERFACE
SERIALIZATION
CLOCK PROPAGATION DELAY, tpd_clk
clock cycles
12x
tpd_clk = 0.5xTs + tdelay
1-Wire with DDR bit clock
0
14x
tpd_clk = 0.428xTs + tdelay
2-Wire with DDR bit clock
tpd_clk = tdelay
1
12x
2-Wire with SDR bit clock
tpd_clk = 0.5xTs + tdelay
0
2
(when tpd_clk ≥ Ts)
2-Wire with DDR bit clock
tpd_clk = 0.857xTs + tdelay
14X
1
(when tpd_clk < Ts)
2-Wire with SDR bit clock
tpd_clk = 0.428xTs + tdelay
0
(1)
Note that the total latency = ADC latency + serializer latency. The ADC latency is 12 clocks
Table 29. Timings for 1-Wire Interface
DATA SETUP TIME, tsu
DATA HOLD TIME, th
tdelay
SAMPLING FREQUENCY
ns
SERIALIZATION
MSPS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
65
0.4
0.6
0.5
0.7
Fs ≥ 40 MSPS
40
0.8
1.0
0.9
1.1
3
4
5
12
×
20
1.6
2.0
1.8
2.2
Fs < 40 MSPS
10
3.5
4.0
3.5
4.2
3
4.5
6
65
0.3
0.5
0.4
0.6
Fs ≥ 40 MSPS
40
0.65
0.85
0.7
0.9
3
4
5
14
×
20
1.3
1.65
1.6
1.9
Fs < 40 MSPS
10
3.2
3.5
3.2
3.6
3
4.5
6
Table 30. Timings for 2-Wire Interface, DDR Bit Clock
DATA SETUP TIME, tsu
DATA HOLD TIME, th
tdelay
SAMPLING FREQUENCY
ns
SERIALIZATION
MSPS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
105
0.55
0.75
0.6
0.8
Fs ≥ 45 MSPS
92
0.65
0.85
0.7
0.9
3.4
4.4
5.4
12
×
80
0.8
1.0
0.8
1.05
65
0.9
1.2
1.0
1.3
Fs < 45 MSPS
40
1.7
2.0
1.1
2.1
3.7
5.2
6.7
105
0.45
0.65
0.6
0.7
Fs ≥ 45 MSPS
92
0.55
0.75
0.7
0.8
3
4
5
14
×
80
0.65
0.85
0.8
0.9
65
0.8
1.1
1.0
1.1
Fs < 45 MSPS
40
1.4
1.7
1.1
1.9
3
4.5
6
Copyright 2007, Texas Instruments Incorporated
61
Product Folder Link(s): ADS6225 ADS6224 ADS6223 ADS6222
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ADS6224IRGZT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 12b 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS6224IRGZTG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 12B 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS6225 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL, 12-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS INTERFACE
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