參數(shù)資料
型號: ADS6224IRGZ25
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48
封裝: 7 X 7 MM, GREEN, PLASTIC, VQFN-48
文件頁數(shù): 36/73頁
文件大?。?/td> 3182K
代理商: ADS6224IRGZ25
www.ti.com
APPLICATION INFORMATION
THEORY OF OPERATION
ANALOG INPUT
INP
INM
25 W
RCR Filter
50 W
3.2 pF
C
1pF
par2
C
1pF
par2
L
3nH
pkg
L
3nH
pkg
C
2pF
bond
C
2pF
bond
R
200
esr
W
R
200
esr
W
C
0.8 pF
par1
Sampling
Switch
Sampling
Switch
Sampling
Capacitor
Sampling
Capacitor
R
15
on
W
R
15
on
W
R
10
on
W
C
4.0 pF
samp
C
4.0 pF
samp
S0237-01
SLAS543A – MAY 2007 – REVISED SEPTEMBER 2007
ADS6225/ADS6224/ADS6223/ADS6222 (ADS622X) is a family of dual channel, 12-bit pipeline ADCs based on
switched capacitor architecture in CMOS technology.
The conversion is initiated simultaneously by all the four channels at the rising edge of the external input clock.
After the input signals are captured by the sample and hold circuit of each channel, the samples are sequentially
converted by a series of low resolution stages. The stage outputs are combined in a digital correction logic block
to form the final 12-bit word with a latency of 12 clock cycles. The 12-bit word of each channel is serialized and
output as LVDS levels. In addition to the data streams, a bit clock and frame clock are also output. The frame
clock is aligned with the 12-bit word boundary.
The analog input consists of a switched-capacitor based differential sample and hold architecture, shown in
Figure 79. This differential topology results in very good AC performance even for high input frequencies. The
INP and INM pins have to be externally biased around a common-mode voltage of 1.5 V, available on VCM pin
13. For a full-scale differential input, each input pin INP, INM has to swing symmetrically between VCM + 0.5 V
and VCM – 0.5 V, resulting in a 2-Vpp differential input swing. The maximum swing is determined by the internal
reference voltages REFP (2.0V nominal) and REFM (1.0 V, nominal). The sampling circuit has a 3 dB bandwidth
that extends up to 500 MHz (Figure 80, shown by the transfer function from the analog input pins to the voltage
across the sampling capacitors).
Figure 79. Input Sampling Circuit
Copyright 2007, Texas Instruments Incorporated
41
Product Folder Link(s): ADS6225 ADS6224 ADS6223 ADS6222
相關(guān)PDF資料
PDF描述
ADS7812PB 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP16
ADS7945SRTER 2-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PQCC16
ADS7945SRTET 2-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PQCC16
ADS7953SBRHBT 16-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PQCC32
ADS7953SRHBT 16-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PQCC32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS6224IRGZR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 12b 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS6224IRGZRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 12B 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS6224IRGZT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 12b 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS6224IRGZTG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 12B 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS6225 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL, 12-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS INTERFACE