參數(shù)資料
型號: ADS6224IRGZ25
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48
封裝: 7 X 7 MM, GREEN, PLASTIC, VQFN-48
文件頁數(shù): 44/73頁
文件大?。?/td> 3182K
代理商: ADS6224IRGZ25
www.ti.com
S0167-05
CLKP
CLKM
DifferentialSine-Wave
orPECL orLVDSClockInput
ADS6xxx
0.1 F
m
0.1 F
m
V
CC
V
CC
REF_IN
VCXO_INM
C
P
_
O
U
T
CTRL
OUTP
OUTM
Y0B
Y0
ADS6xxx
CLKM
CLKP
VCXO
CDCM7005
VCXO_INP
Reference Clock
S0238-02
S0168-07
CLKP
CLKM
CMOSClockInput
ADS6xxx
0.1 F
m
0.1 F
m
SLAS543A – MAY 2007 – REVISED SEPTEMBER 2007
Figure 88. Differential Clock Driving Circuit
Figure 89 shows a typical scheme using PECL clock drive from a CDCM7005 clock driver. SNR performance
with this scheme is comparable with that of a low jitter sine wave clock source.
Figure 89. PECL Clock Drive Using CDCM7005
Single-ended CMOS clock can be ac-coupled to the CLKP input, with CLKM (pin) connected to ground with a
0.1-
μF capacitor, as shown in Figure 90.
Figure 90. Single-Ended Clock Driving Circuit
Copyright 2007, Texas Instruments Incorporated
49
Product Folder Link(s): ADS6225 ADS6224 ADS6223 ADS6222
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