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參數(shù)資料
| 型號： | ADE7878ACPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Poly Phase Multifunction Energy Metering IC With Total And Fundamental Powers, No Of Pins: 40, Temperature Range: Ind |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, QCC40 |
| 封裝： | 6 X 6 MM, ROHS COMPLIANT, MO-220WJJD, LFCSP-40 |
| 文件頁數(shù)： | 7/96頁 |
| 文件大小： | 1096K |
| 代理商： | ADE7878ACPZ |
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ADE7854/ADE7858/ADE7868/ADE7878
Rev. E | Page 15 of 96
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. NC = NO CONNECT.
2. CREATE A SIMILAR PAD ON THE PCB UNDER THE
EXPOSED PAD. SOLDER THE EXPOSED PAD TO
THE PAD ON THE PCB TO CONFER MECHANICAL
STRENGTH TO THE PACKAGE. DO NOT CONNECT
THE PADS TO AGND.
11
N
C
12
IB
N
13
IC
P
15
IN
P
17
R
E
F
IN
/O
U
T
16
IN
N
18
V
N
19
V
C
P
20
N
C
14
IC
N
NC
PM0
PM1
RESET
DVDD
DGND
IAP
IAN
IBP
NC
VAP
AVDD
AGND
VDD
CLKIN
CLKOUT
IRQ0
NC
VBP
NC
33
C
F
1
34
C
F
2
35
C
F
3/
H
S
C
L
K
36
S
C
L
K
/S
C
L
37
M
IS
O
/H
S
D
38
M
O
S
I/
S
D
A
39
S
/H
S
A
40
N
C
32
IR
Q
1
31
N
C
08
51
0-
1
06
1
2
3
4
5
6
7
8
9
10
23
24
25
26
27
28
29
30
22
21
ADE78xx
TOP VIEW
(Not to Scale)
Figure 9. Pin Configuration
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 10, 11, 20,
21, 30, 31, 40
NC
No Connect. These pins are not connected internally.
2
PM0
Power Mode Pin 0. This pin, combined with PM1, defines the power mode of the
ADE7854/ADE7858/ADE7868/ADE7878, as described in Table 9.
3
PM1
Power Mode Pin 1. This pin defines the power mode of the ADE7854/ADE7858/ADE7868/ADE7878
when combined with PM0, as described in Table 9.
4
RESET
Reset Input, Active Low. In PSM0 mode, this pin should stay low for at least 10 μs to trigger a
hardware reset.
5
DVDD
This pin provides access to the on-chip 2.5 V digital LDO. Do not connect any external active
circuitry to this pin. Decouple this pin with a 4.7 μF capacitor in parallel with a ceramic 220 nF
capacitor.
6
DGND
Ground Reference. This pin provides the ground reference for the digital circuitry.
7, 8
IAP, IAN
Analog Inputs for Current Channel A. This channel is used with the current transducers and is
referenced in this document as Current Channel A. These inputs are fully differential voltage inputs
with a maximum differential level of ±0.5 V. This channel also has an internal PGA equal to the ones
on Channel B and Channel C.
9, 12
IBP, IBN
Analog Inputs for Current Channel B. This channel is used with the current transducers and is
referenced in this document as Current Channel B. These inputs are fully differential voltage inputs
with a maximum differential level of ±0.5 V. This channel also has an internal PGA equal to the ones
on Channel C and Channel A.
13, 14
ICP, ICN
Analog Inputs for Current Channel C. This channel is used with the current transducers and is
referenced in this document as Current Channel C. These inputs are fully differential voltage inputs
with a maximum differential level of ±0.5 V. This channel also has an internal PGA equal to the ones
on Channel A and Channel B.
15, 16
INP, INN
Analog Inputs for Neutral Current Channel N. This channel is used with the current transducers and
is referenced in this document as Current Channel N. These inputs are fully differential voltage
inputs with a maximum differential level of ±0.5 V. This channel also has an internal PGA, different
from the ones found on the A, B, and C channels. The neutral current channel is available in the
ADE7878 and ADE7868. In the ADE7858 and ADE7854, connect these pins to AGND.
17
REFIN/OUT
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal
value of 1.2 V. An external reference source with 1.2 V ± 8% can also be connected at this pin. In
either case, decouple this pin to AGND with a 4.7 μF capacitor in parallel with a ceramic 100 nF
capacitor. After reset, the on-chip reference is enabled.
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