
ADE7854/ADE7858/ADE7868/ADE7878
Rev. E | Page 51 of 96
The ADE7858/ADE7868/ADE7878 have sign detection circuitry
for reactive power calculations that can monitor the total reactive
powers or the fundamental reactive powers. As described in the
mulation is executed in two stages. Every time a sign change is
detected in the energy accumulation at the end of the first stage,
that is, after the energy accumulated into the internal accumulator
reaches the VARTHR register threshold, a dedicated interrupt is
triggered. The sign of each phase reactive power can be read in
the PHSIGN register. Bit 7 (REVRPSEL) in the ACCMODE
register sets the type of reactive power being monitored. When
REVRPSEL is 0, the default value, the total reactive power is
monitored. When REVRPSEL is 1, then the fundamental
reactive power is monitored.
Bits[12:10] (REVRPC, REVRPB, and REVRPA, respectively)
in the STATUS0 register are set when a sign change occurs in
the power selected by Bit 7 (REVRPSEL) in the ACCMODE
register.
Bits[6:4] (CVARSIGN, BVARSIGN, and AVARSIGN, respectively)
in the PHSIGN register are set simultaneously with the REVRPC,
REVRPB, and REVRPA bits. They indicate the sign of the reactive
power. When they are 0, the reactive power is positive. When
they are 1, the reactive power is negative.
Bit REVRPx of the STATUS0 register and Bit xVARSIGN in the
PHSIGN register refer to the reactive power of Phase x, the
power type being selected by Bit REVRPSEL in ACCMODE
register.
Setting Bits[12:10] in the MASK0 register enables the REVRPC,
REVRPB, and REVRPA interrupts, respectively. If enabled, the
IRQ0 pin is set low and the status bit is set to 1 whenever a change
of sign occurs. To find the phase that triggered the interrupt,
the PHSIGN register is read immediately after reading the
STATUS0 register. Next, the status bit is cleared and the IRQ0
pin is set to high by writing to the STATUS0 register with the
corresponding bit set to 1.
Table 18. Sign of Reactive Power Calculation
Integrator
Sign of Reactive Power
Between 0 to +180
Off
Positive
Between 180 to 0
Off
Negative
Between 0 to +180
On
Positive
Between 180 to 0
On
Negative
1 Φ is defined as the phase angle of the voltage signal minus the current
signal; that is, Φ is positive if the load is inductive and negative if the load is
capacitive.
Reactive Energy Calculation
Reactive energy is defined as the integral of reactive power.
Reactive Energy = ∫q(t)dt
(36)
Both total and fundamental reactive energy accumulations are
always a signed operation. Negative energy is subtracted from
the reactive energy contents.
Similar to active power, the ADE7858/ADE7868/ADE7878
achieve the integration of the reactive power signal in two
stages (see
Figure 66). The process is identical for both total and
fundamental active powers.
The first stage is conducted inside the DSP: every 125 μs
(8 kHz frequency), the instantaneous phase total reactive
or fundamental power is accumulated into an internal
register. When a threshold is reached, a pulse is generated
at the processor port and the threshold is subtracted from
the internal register. The sign of the energy in this moment
is considered the sign of the reactive power (see the
Sign ofThe second stage is performed outside the DSP and consists
in accumulating the pulses generated by the processor into
internal 32-bit accumulation registers. The content of these
registers is transferred to the var-hour registers (xVARHR and
xFVARHR) when these registers are accessed. AVARHR,
BVARHR, CVARHR, AFWATTHR, BFWATTHR, and
CFWATTHR represent phase fundamental reactive powers.
this process. The VARTHR 48-bit signed register contains the
threshold and it is introduced by the user. It is introduced by the
user and is common for both total and fundamental phase reactive
powers. Its value depends on how much energy is assigned to
one LSB of var-hour registers. Supposing a derivative of a volt
ampere reactive hour (varh) at [10n varh] where n is an integer,
is desired as one LSB of the VARHR register. Then, the VARTHR
register can be computed using the following equation:
FS
n
s
I
U
f
PMAX
VARTHR
×
=
10
3600
where:
PMAX = 33,516,139 = 0x1FF6A6B, the instantaneous power
computed when the ADC inputs are at full scale.
fS = 8 kHz, the frequency with which the DSP computes the
instantaneous power.
UFS, IFS are the rms values of phase voltages and currents when
the ADC inputs are at full scale.
The maximum value that may be written on the VARTHR
register is 247 1. The minimum value is 0x0, but it is
recommended to write a number equal to or greater than
PMAX. Never use negative numbers.
VARTHR is a 48-bit register. As previously stated in the
VoltageADE7868/ADE7878 work on 32-, 16-, or 8-bit words. Similar to
the WTHR register shown in
Figure 64, VARTHR is accessed as
two 32-bit registers (VARTHR1 and VARTHR0), each having eight
MSBs padded with 0s.