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參數(shù)資料
| 型號： | ADAV4601BSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 44/60頁 |
| 文件大小： | 0K |
| 描述： | IC AUDIO CODEC PROCESSOR 80-LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | SigmaDSP® |
| 類型： | 音頻處理器 |
| 應(yīng)用： | TV |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 托盤 |
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ADAV4601
Rev. B | Page 49 of 60
Address 0x0004 Serial Port Control 1 Register (Default: 0x0000)
Table 46.
Bit No.
Bit Name
Description
Default
Bits[15:13]
Reserved
Always write as 0 if writing to this register.
000
Bits[12:11]
SRC2 serial mode
Used to select the format of the data for SRC2.
00
00b = I2S
01b = left-justified
10b = right-justified
11b = not applicable
Bits[10:9]
SRC2 word width
Used to specify the word width of the data.
00
00b = 24 bits
01b = 20 bits
10b = 16 bits
11b = not applicable
Bits[8:7]
SRC1 serial mode
Used to select the format of the data for SRC1.
00
00b = I2S
01b = left-justified
10b = right-justified
11b = not applicable
Bits[6:5]
SRC1 word width
Used to specify the word width of the data.
00
00b = 24 bits
01b = 20 bits
10b = 16 bits
11b = not applicable
Bit[4]
Sync master slave
Used to set master or slave mode for the synchronous input. In slave mode, LRCLK1 and BCLK1
are provided by another source. In master mode, the ADAV4601 provides LRCLK1 and BCLK1.
0
0b = slave
1b = master
Bits[3:2]
Sync serial mode
Used to select the format of the data for the inputs used by the synchronous serial input block.
00
00b = I2S
01b = left-justified
10b = right-justified
11b = not applicable
Bits[1:0]
Sync word width
Used to specify the word width of the data for the synchronous digital inputs.
00
00b = 24 bits
01b = 20 bits
10b = 16 bits
11b = not applicable
Address 0x0005 Analog Power Management 1 Register (Default: 0x8000)
Table 47.
Bit No.
Bit Name
Description
Default
Bit[15]
DAC standby disable
Set to 1 after reset, which means all DACs are in normal mode but are still powered down.
1
0b = DACs in low power mode
1b = DACs in normal mode
Bit[14]
Reserved
Always write as 0 if writing to this register.
0
Bit[13]
REF BUF
Provides the voltage reference for the analog core.
0
1b = block powered up
0b = block powered down
Bit[12]
Reserved
Always write as 0 if writing to this register.
0
Bit[11]
Reserved
Always write as 0 if writing to this register.
0
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