
ADAV4601
Rev. B | Page 24 of 60
SIGMASTUDIO PIN ASSIGNMENT
Inputs and outputs are defined as numbers in SigmaStudio.
Each number corresponds to a physical input or output on the
Table 10. Input Channels
SigmaStudio Input
Pin Name
0
SDINL0
1
SDINR0
2
SDINL1
3
SDINR1
4
SDINL2/SRC2BL
5
SDINR2/SRC2BR
6
SDINL3/SRC2CL
7
SDINR3/SRC2CR
8
AUXIN1L
9
AUXIN1R
10, 11
No connect
12
SRC1L
13
SRC1R
14
SRC2AL
15
SRC2AR
16, 17
No connect
Table 11. Output Channels
Sigma Studio Output
Pin Name
0
SDOL0
1
SDOR0
2 to 7
No connect
8
PWM1/AUXOUT3L
9
PWM2/AUXOUT3R
10
AUXOUT4L/Headphone 1L
11
AUXOUT4R/Headphone 1R
12
AUXOUT1L
13
AUXOUT1R
14
PWM3
15
PWM4
16 to 19
No connect
20
SPDIF OUTL
21
SPDIF OUTR
APPLICATION LAYER
Unique to the ADAV46xx family is the embedded application
layer, which allows the user to define a custom set of registers to
control the audio flow, greatly simplifying the interface between
the audio processor and the system controller. This allows the
ADAV4601 to appear as a simple fixed function register-based
device to the system controller.
When a custom flow is created, a user-customized register map
can be defined for controlling the flow. Each register is 16 bits,
but controls can use only one bit or all 16 bits. Users have full
control over which parameters they use and the degree of
control they have over those parameters during run time. The
combination of the graphical programming environment and
the powerful application layer allows the user to quickly develop
a custom audio flow and still maintain the usability of a simple
register-based device.
LOADING A CUSTOM AUDIO PROCESSING FLOW
The ADAV4601 can load a custom audio flow from an external
I2C ROM. The boot process is initiated by a simple control register
write. The EEPROM device address and the EEPROM start address
for the audio flow ROMs can all be programmed.
For the duration of the boot sequence, the ADAV4601 becomes the
master on the I2C bus. Transfer of the ROMs from the EEPROM to
the ADAV4601 takes a maximum of 1.06 sec, assuming that the full
audio processor memory is required, during which time no other
devices should access the I2C bus. When the transfer is complete,
the ADAV4601 automatically reverts to slave mode, and the I2C bus
master can resume sending commands.
AUDIO
PROCESSOR
MEMORY
ADDRESS
DATA
DEFAULT
CODE
I2C PORT
LOAD
ON
COMMAND
LOAD
ON
RESET
BOOT-UP
ROM
CUSTOM
CODE
EXTERNAL
BOOT-UP ROM
47260 BYTES (MAX)
0
70
-0
29
AUDIO
PROCESSOR
Figure 37. External EEPROM Booting
NUMERIC FORMATS
It is common in DSP systems to use a standardized method
of specifying numeric formats. Fractional number systems are
specified by an A.B format, where A is the number of bits to the
left of the decimal point and B is the number of bits to the right
of the decimal point.
The ADAV4601 uses the same numeric format for both the
coefficient values (stored in the parameter RAM) and the signal
data values.
Numeric Format: 5.23
It ranges from 16.0 to (+16.0 1 LSB).