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| 型號： | AD9991KCPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCD SIGNAL PROCESSOR 56-LFCSP |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | CCD 信號處理器，10 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 56-LFCSP-VQ（8x8） |
| 包裝： | 帶卷 (TR) |
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AD9991
–26–
SHUTTER TIMING CONTROL
The CCD image exposure time is controlled by the substrate
clock signal (SUBCK), which pulses the CCD substrate to clear
out accumulated charge. The AD9991 supports three types of
electronic shuttering: normal shutter, high precision shutter,
and low speed shutter. Along with the SUBCK pulse placement,
the AD9991 can accommodate different readout congurations
to further suppress the SUBCK pulses during multiple eld
readouts. The AD9991 also provides programmable outputs to
control an external mechanical shutter (MSHUT), strobe/ash
(STROBE), and the CCD bias select signal (VSUB).
Normal Shutter Operation
By default, the AD9991 is always operating in the normal shutter
conguration in which the SUBCK signal is pulsing in every VD
eld (see Figure 26). The SUBCK pulse occurs once per line,
and the total number of repetitions within the eld will determine
the length of the exposure time. The SUBCK pulse polarity
and toggle positions within a line are programmable using the
SUBCKPOL and SUBCK1TOG registers (see Table XI).
The number of SUBCK pulses per eld is programmed in the
SUBCKNUM register (addr. 0x63).
As shown in Figure 26, the SUBCK pulses will always begin
in the line following the SG active line, which is specied in
the SGACTLINE registers for each eld. The SUBCKPOL,
SUBCK1TOG, SUBCK2TOG, SUBCKNUM, and SUBCK-
SUPPRESS registers are updated at the start of the line after the
sensor gate line, as described in the Serial Update section.
High Precision Shutter Operation
High precision shuttering is used in the same manner as nor-
mal shuttering, but uses an additional register to control the
very last SUBCK pulse. In this mode, the SUBCK still pulses
once per line, but the last SUBCK in the eld will have an
additional SUBCK pulse whose location is determined by the
SUBCK2TOG register, as shown in Figure 27. Finer resolution
of the exposure time is possible using this mode. Leaving the
SUBCK2TOG register set to max value (0xFFFFFF) will disable
the last SUBCK pulse (default setting).
Low Speed Shutter Operation
Normal and high precision shutter operations are used when
the exposure time is less than one eld long. For long exposure
times greater than one eld interval, low speed shutter opera-
tion is used. The AD9991 uses a separate exposure counter to
achieve long exposure times. The number of elds for the low
speed shutter operation is specied in the EXPOSURE register
(addr. 0x62). As shown in Figure 28, this shutter mode will
suppress the SUBCK and VSG outputs for up to 4095 elds
(VD periods). The VD and HD outputs may be suppressed
during the exposure period by programming the VDHDOFF
register to 1.
To generate a low speed shutter operation, it is necessary to trig-
ger the start of the long exposure by writing to the TRIGGER
register bit D3. When this bit is set High, the AD9991 will begin
an exposure operation at the next VD edge. If a value greater than
zero is specied in the EXPOSURE register, the AD9991 will
suppress the SUBCK output on subsequent elds.
VD
SUBCK
SUBCK PROGRAMMABLE SETTINGS:
1. PULSE POLARITY USING THE SUBCKPOL REGISTER
2. NUMBER OF PULSES WITHIN THE FIELD USING THE SUBCKNUM REGISTER (SUBCKNUM = 3 IN THE ABOVE FIGURE)
3. PIXEL LOCATION OF PULSE WITHIN THE LINE AND PULSEWIDTH PROGRAMMED USING SUBCK1 TOGGLE POSITION REGISTER
t
EXP
VSG
HD
t
EXP
Figure 26. Normal Shutter Mode
VD
SUBCK
NOTES
1. SECOND SUBCK PULSE IS ADDED IN THE LAST SUBCK LINE.
2. LOCATION OF 2ND PULSE IS FULLY PROGRAMMABLE USING THE SUBCK2 TOGGLE POSITION REGISTER.
VSG
HD
t
EXP
t
EXP
Figure 27. High Precision Shutter Mode
REV. 0
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