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參數(shù)資料
| 型號： | AD9979BCPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 36/56頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PROCESSOR CCD 14BIT 48-LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | CCD 信號處理器，14 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 電流 - 電源： | 48mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD9979BCPZRLDKR |
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AD9979
Rev. C | Page 41 of 56
LAYOUT OF INTERNAL REGISTERS
The AD9979 address space is divided into two different register
areas, as illustrated in Figure 58. In the first area, Address 0x000 to
Address 0x7FF contain the registers for the AFE, miscellaneous
functions, VD/HD parameters, input/output control, mode
control, timing core, test, and update control functions. The
second area of the address space, beginning at Address 0x800,
consists of the registers for the H-pattern groups and fields.
This is a configurable set of register space; the user can decide
how many Hpattern groups and fields are used in a particular
design. The AD9979 supports up to 32 H-patterns.
Register 0x28 specifies the total number of H-pattern groups.
The starting address for the H-pattern group registers is always
0x800, and the starting address for the field registers is determined
by the number of H-pattern groups, and it is equal to 0x800
plus the number of H-pattern groups times 16. Each H-pattern
group and field occupies 16 register addresses.
It is important to note that the H-pattern group and field
registers must always occupy a continuous block of addresses.
Figure 59 shows an example using three H-pattern groups and
two fields. The starting address for the H-pattern groups is
always 0x800. Because HPATNUM is set to 3, the H-pattern
groups occupy 48 address locations, that is, 16 registers times
3 H-pattern groups. The starting address of the field registers
for this example is 0x830, or 0x800 plus 48 (decimal). Note the
decimal value must be converted to a hexadecimal number
before adding it to 0x800.
The AD9979 address space contains many unused addresses.
Undefined addresses between Address 0x00 and Address 0xFF
must not be written to; otherwise, the AD9979 can operate
incorrectly. Continuous register writes needs to be performed
carefully to avoid writing to undefined registers.
FIXED REGISTER AREA
AFE REGISTERS
MISCELLANEOUS FUNCTION REGISTERS
VD/HD REGISTERS
I/O REGISTERS
MODE CONTROL REGISTERS
TIMING CORE REGISTERS
TEST REGISTERS
UPDATE CONTROL REGISTERS
INVALID—DO NOT ACCESS
CONFIGURABLE REGISTER AREA
H-PATTERN GROUPS
FIELDS
ADDR 0x000
ADDR 0x7FF
HPAT START 0x800
FIELD START
MAX 0xFFF
NOTES
1. THE H-PATTERN GROUP AND FIELD REGISTERS MUST OCCUPY A CONTINUOUS BLOCK OF ADDRESSES.
05
95
7-
0
60
Figure 58. Layout of AD9979 Registers
2 FIELDS
(16 × 2 = 32 REGISTERS)
3 H-PATTERN GROUPS
(16 × 3 = 48 REGISTERS)
UNUSED MEMORY
ADDR 0x800
ADDR 0x830
ADDR 0x850
MAX 0xFFF
059
57
-06
1
Figure 59. Example Register Configuration
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