參數(shù)資料
型號(hào): AD9990BBCZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/2頁(yè)
文件大?。?/td> 0K
描述: IC CCD SGNL PROCESSOR 112CSPBGA
標(biāo)準(zhǔn)包裝: 1
類型: CCD 信號(hào)處理器,14 位
安裝類型: 表面貼裝
封裝/外殼: 112-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 112-CSPBGA(8x8)
包裝: 帶卷 (TR)
Dual-Channel, 14-Bit CCD Signal Processor
and Precision Timing Core
AD9990
Rev. SpB
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2007–2010 Analog Devices, Inc. All rights reserved.
FEATURES
1.8 V AFETG core
Internal LDO regulators
24 programmable vertical clock signals
Correlated double sampler (CDS) with
3 dB, 0 dB, +3 dB, and +6 dB gain
6 dB to 42 dB, 10-bit variable gain amplifier (VGA)
14-bit, 32 MHz analog-to-digital converter (ADC)
Black level clamp with variable level control
Complete on-chip timing generator
Precision Timing core with ~488 ps resolution
On-chip 3 V horizontal and RG drivers
General-purpose outputs (GPOs) for shutter and
system support
On-chip driver for external crystal
On-chip sync generator with external sync input
112-ball CSP_BGA package, 8 mm × 8 mm, 0.65 mm pitch
APPLICATIONS
Digital still cameras
GENERAL DESCRIPTION
The AD9990 is a highly integrated CCD signal processor for
digital still camera applications. It includes a complete analog
front end with analog-to-digital conversion and a full-function,
programmable timing generator for a 2-channel output CCD.
Each channel is specified up to 32 MHz. The timing generator is
capable of supporting up to 24 vertical clock signals to control
advanced CCDs. A Precision Timing core allows adjustment of
high speed clocks with ~488 ps resolution at 32 MHz operation.
The AD9990 also contains eight general-purpose outputs that
can be used for shutter and system functions.
Each analog front end includes black level clamping, a CDS, a
VGA, and a 14-bit ADC. The timing generator provides all the
necessary CCD clocks: RG, H-clocks, V-clocks, sensor gate
pulses, substrate clock, and substrate bias control.
The AD9990 is specified over an operating temperature range
of 25°C to +85°C.
For more information about the AD9990, contact Analog Devices
via email at afe.ccd@analog.com.
FUNCTIONAL BLOCK DIAGRAM
CDS
VGA
CLAMP
14-BIT
ADC
SL
SCK
SDATA
CLI
VREF_B
6dB TO 42dB
HORIZONTAL
DRIVERS
VERTICAL
TIMING
CONTROL
RG_A, RG_B
H1A TO H4A, H1B TO H4B
24
REFT_B REFB_B
PRECISION
TIMING
GENERATOR
SYNC
GENERATOR
INTERNAL CLOCKS
HD
VD SYNC
INTERNAL
REGISTERS
CCDIN_A
–3dB, 0dB, +3dB, +6dB
14
HL_A, HL_B
CLO
GPO1 TO GPO8
XV1 TO XV24
1.8V OUTPUT
3V INPUT
8
LDO
REG_B
1.8V OUTPUT
3V INPUT
LDO
REG_A
SUBCK
RST
CDS
VGA
CLAMP
14-BIT
ADC
6dB TO 42dB
CCDIN_B
–3dB, 0dB, +3dB, +6dB
14
VREF_A
REFT_A
REFB_A
2
DATA
OUTPUT
MUX
DOUT
14
AD9990
0
68
94
-0
01
DCLK
Figure 1.
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