參數(shù)資料
型號: AD9923ABBCZ
廠商: Analog Devices Inc
文件頁數(shù): 40/84頁
文件大小: 0K
描述: IC PROCESSOR CCD 12BIT 105CSPBGA
標(biāo)準(zhǔn)包裝: 1
類型: CCD 信號處理器,12 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
電流 - 電源: 20mA
安裝類型: 表面貼裝
封裝/外殼: 105-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 105-CSPBGA(8x8)
包裝: 托盤
AD9923A
Rev. A | Page 45 of 84
Table 38. XSUBCNT Multiplexer
Register
Length
(Bits)
Range
Description
XSUBCNT_MUX
5
0 to 31
Selects internal signal to
be used for XSUBCNT
0: XV6
1: XV8
2: XV9
3: XV10
4: VSG5
5: VSG6
6: VSG7
7: VSG8
8: VSG2
9: VSG3
10: VSG4
11: VSG1
12: XV13
13: VSUB
14: MSHUT
15: STROBE
16: XV1
17: XV2
18: XV3
19: XV4
20: XV5
21: XV7
22: XV11
23: XV12
24: SHUT0
25: SHUT1
26: SHUT2
27: SHUT3
28: FG_TRIG
29: invalid setting
30: high
31: low
SUBCK: Normal Operation
By default, the AD9923A operates in a normal SUBCK configu-
ration with the SUBCK signal pulsing in every VD field (see
Figure 64). The SUBCK pulse occurs once per line, and the total
number of repetitions within the field determines the exposure
time. The SUBCK pulse polarity and toggle positions within a
line are programmable, using the SUBCKPOL and SUBCK1TOG
registers (see Table 39). The number of SUBCK pulses per field
is programmed in the SUBCKNUM register (Address 0x64).
As shown in Figure 64, the SUBCK pulses always begin in the
line following the SG active line (specified in the SGACTLINE
registers for each field). The SUBCKPOL, SUBCK1TOG,
SUBCK2TOG, SUBCKNUM, and SUBCKSUPPRESS registers
are updated at the start of the line after the sensor gate line, as
described in the Updating New Register Values section.
SUBCK: High Precision Operation
High precision shuttering is used in the same manner as normal
shuttering, but an additional register is used to control the last
SUBCK pulse. In this mode, the SUBCK pulses once per line,
but the last SUBCK in the field has an additional SUBCK pulse,
whose location is determined by the SUBCK2TOGx registers,
as shown in Figure 65. Finer resolution of the exposure time is
possible using this mode. Leaving the SUBCK2TOGx registers
set to their maximum value (0xFFFFFF) disables the last
SUBCK pulse (default setting).
SUBCK: Low Speed Operation
Normal and high precision shutter operations are used when
the exposure time is less than one field long. For exposure times
longer than one field interval, low speed shutter operation is
used. The AD9923A uses a separate exposure counter to
achieve long exposure times. The number of fields for the low
speed shutter operation is specified in the EXPOSURENUM
register (Address 0x63). As shown in Figure 66, this shutter
mode suppresses the SUBCK and VSG outputs from 0 fields up
to 4095 fields (VD periods). The VD and HD outputs can be
suppressed during the exposure period by programming the
VDHDOFF register to 1.
To generate a low speed shutter operation, trigger a long ex-
posure by writing to the TRIGGER register, Bit D3. When this
bit is set high, the AD9923A begins an exposure operation at
the next VD edge. If a value greater than 0 is specified in the
EXPOSURENUM register, the AD9923A suppresses the
SUBCK output on subsequent fields.
If the exposure is generated using the TRIGGER register and
the EXPOSURENUM register is set to 0, the behavior of the
SUBCK is the same as during normal shutter or high precision
shutter operations, in which the TRIGGER register is not used.
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