參數(shù)資料
型號(hào)： AD9854ASTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 26/52頁(yè)
文件大?。?/td> 0K
描述： IC DDS QUADRATURE CMOS 80-LQFP
產(chǎn)品培訓(xùn)模塊： Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
標(biāo)準(zhǔn)包裝： 1
分辨率（位）： 12 b
主 fclk： 300MHz
調(diào)節(jié)字寬（位）： 48 b
電源電壓： 3.14 V ~ 3.47 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-LQFP（14x14）
包裝： 托盤
產(chǎn)品目錄頁(yè)面： 552 (CN2011-ZH PDF)
配用： AD9854/PCBZ-ND - BOARD EVAL FOR AD9854
AD9854
Rev. E | Page 32 of 52
PROGRAMMING THE AD9854
The AD9854 register layout table (Table 8) contains information
for programming the chip for the desired functionality. Although
many applications require very little programming to configure
the AD9854, some use all 12 accessible register banks. The
AD9854 supports an 8-bit parallel I/O operation or an SPI-
compatible serial I/O operation. All accessible registers can be
written and read back in either I/O operating mode.
S/P SELECT (Pin 70) is used to configure the I/O mode.
Systems that use the parallel I/O mode must connect the S/P
SELECT pin to VDD. Systems that operate in the serial I/O mode
must tie the S/P SELECT pin to GND.
Regardless of the mode, the I/O port data is written to a buffer
memory and only affects operation of the part after the contents
of the buffer memory are transferred to the register banks. This
transfer of information occurs synchronously to the system
clock in one of two ways:
Internally, at a rate programmable by the user.
Externally, by the user. I/O operations can occur in the
absence of REFCLK, but the data cannot be moved from
the buffer memory to the register bank without REFCLK.
more details.)
MASTER RESET
The MASTER RESET pin must be held at logic high active
for a minimum of 10 system clock cycles. This initializes the
communications bus and loads the default values listed in the
Table 8 section.
Table 7. REFCLK Multiplier Control Register Values
Reference Multiplier
Multiplier Value
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
4
0
1
0
5
0
1
0
1
6
0
1
0
7
0
1
8
0
1
0
9
0
1
0
1
10
0
1
0
1
0
11
0
1
0
1
12
0
1
0
13
0
1
0
1
14
0
1
0
15
0
1
16
1
0
17
1
0
1
18
1
0
1
0
19
1
0
1
20
1
0
1
0
相關(guān)PDF資料
PDF描述
AD9858BSVZ IC DDS DAC 10BIT 1GSPS 100-TQFP
AD9859YSVZ-REEL7 IC DDS DAC 10BIT 400MSPS 48TQFP
AD9880KSTZ-100 IC INTERFACE/HDMI 100MHZ 100LQFP
AD9882KSTZ-140 IC INTERFACE/DVI 100MHZ 100LQFP
AD9883ABSTZ-RL140 IC INTERFACE FLAT 140MHZ 80LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9854ASVZ 制造商:Analog Devices 功能描述:CMOS 300 MSPS QUADRATURE COMPLETE DDS 制造商:Analog Devices 功能描述:CMOS 300 MSPS QUADRATURE COMPLETE DDS - Trays 制造商:Analog Devices 功能描述:SYNTHESIZER 制造商:Analog Devices 功能描述:Complete DDS Quadrature 300MSPS TQFP80
AD9854PCB 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS 300 MSPS Quadrature Complete DDS
AD9856 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS 200 MHz Quadrature Digital Upconverter
AD9856/PCB 制造商:Analog Devices 功能描述:Evaluation Board For Digital Up Converter 56 Pin LFCSP Ep 制造商:Analog Devices 功能描述:DGTL UP CNVRTR 56LFCSP - Bulk
AD9856AST 制造商:Analog Devices 功能描述:Digital Up Converter 48-Pin LQFP Tray 制造商:Analog Devices 功能描述:IC MODULATOR DIGITAL
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*