參數(shù)資料
型號(hào)： AD9782
廠商： Analog Devices, Inc.
英文描述： 12-Bit, 200 MSPS/500 MSPS TxDAC+ with 2 x /4 x /8 x Interpolation and Signal Processing
中文描述： 12位，200 MSPS/500 MSPS的TxDAC系列與2 × / 4 × / 8 ×插值與信號(hào)處理
文件頁(yè)數(shù)： 5/52頁(yè)
文件大?。?/td> 1619K
代理商： AD9782
Preliminary Technical Data
AD9782
DYNAMIC SPECIFICATIONS
Table 2. T
MIN
to T
MAX
, AVDD1, AVDD2 = 3.3 V, ACVDD, ADVDD, CLKVDD, DVDD, DRVDD = 2.5 V, I
OUTFS
= 20 mA,
Differential Transformer Coupled Output, 50 Doubly Terminated, unless otherwise noted
Parameter
DYNAMIC PERFORMANCE
Maximum DAC Output Update Rate (f
DAC
)
Output Settling Time (t
ST
) (to 0.025%)
Output Propogation Delay
5
(t
PD
)
Output Rise Time (10%–90%)
6
Output Fall Time (90%–10%)
6
Output Noise (I
OUTFS
= 20 mA)
AC LINEARITY—BASEBAND MODE
Spurious-Free Dynamic Range (SFDR) to Nyquist (f
OUT
= 0 dBFS)
f
DATA
= 160 MSPS; f
OUT
= 1 MHz
f
DATA
= MSPS; f
OUT
= MHz
f
DATA
= MSPS; f
OUT
= MHz
f
DATA
= MSPS; f
OUT
= MHz
f
DATA
= MSPS; f
OUT
= MHz
f
DATA
= MSPS; f
OUT
= MHz
Two-Tone Intermodulation (IMD) to Nyquist (f
OUT1
= f
OUT2
= –6 dBFS)
f
DATA
= 160 MSPS; f
OUT1
=25 MHz; f
OUT2
= 31 MHz
f
DATA
= MSPS; f
OUT1
= MHz; f
OUT2
= MHz
f
DATA
= MSPS; f
OUT1
= MHz; f
OUT2
= MHz
f
DATA
= MSPS; f
OUT1
= MHz; f
OUT2
= MHz
f
DATA
= MSPS; f
OUT1
= MHz; f
OUT2
= MHz
f
DATA
= MSPS; f
OUT1
= MHz; f
OUT2
= MHz
Total Harmonic Distortion (THD)
f
DATA
= MSPS; f
OUT
= MHz; 0 dBFS
f
DATA
= MSPS; f
OUT
= MHz; 0 dBFS
Signal-to-Noise Ratio (SNR)
f
DATA
= MSPS; f
OUT
= MHz; 0 dBFS
f
DATA
= MSPS; f
OUT
= MHz; 0 dBFS
Adjacent Channel Power Ratio (ACPR)
WCDMA with MHz BW, MHz Channel Spacing
IF = 16 MHz, f
DATA
= 65.536 MSPS
IF = 32 MHz, f
DATA
= 131.072 MSPS
Four-Tone Intermodulation
MHz, MHz, MHz and MHz at –12 dBFS (f
DATA
= MSPS, Missing Center)
AC LINEARITY—IF MODE
Four-Tone Intermodulation at IF = MHz
MHz, MHz, MHz and MHz at dBFS
f
DATA
= MSPS, f
DAC
= MHz
Rev. PrC | Page 5 of 52
Min
500
Typ
95
80
Max
Unit
MSPS
ns
ns
ns
ns
pA√Hz
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dB
dB
dBFS
dBFS
dBc
dBc
dBFS
dBFS
5
Propagation delay is delay from CLK input to DAC update.
6
Measured single-ended into 50 load.
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