參數(shù)資料
型號： AD9782
廠商： Analog Devices, Inc.
英文描述： 12-Bit, 200 MSPS/500 MSPS TxDAC+ with 2 x /4 x /8 x Interpolation and Signal Processing
中文描述： 12位，200 MSPS/500 MSPS的TxDAC系列與2 × / 4 × / 8 ×插值與信號處理
文件頁數(shù)： 24/52頁
文件大?。?/td> 1619K
代理商： AD9782
AD9782
Preliminary Technical Data
AD9782 CLOCK/DATA TIMING
DLL Disabled, Two-Port Data Mode, DATACLK as Output
With the interpolation set to 1×, the DATACLK output is a
delayed and inverted version of DACCLK at the same
frequency. Note that DACCLK refers to the differential clock
inputs applied at Pins 5 and 6. As Figure 37 shows, there is a
constant delay between the rising edge of DACCLK and the
falling edge of DATACLK.
Rev. PrC | Page 24 of 52
The DCLKPOL bit (Reg 02 Bit 4) allows the data to be latched
into the AD9782 on either the rising or falling edge of
DACCLK. With DCLKPOL = 1, the data is latched in on the
rising edge of Diff Clk, as shown in Figure 37. With DCLKPOL
= 0, as shown in Figure 38, data is latched in on the falling edge
of DACCLK. The setup and hold times are always with respect
to the latched edge of DACCLK.
0
DACCLK
IN
DATACLK
OUT
DATA
t
t
D
= 5ns TYP
t
S
= –0.5ns TYP
t
H
= 2.9ns TYP
Figure 37. Data Timing, DLL Off, 1× Interpolation, DCLKPOL = 1
0
DACCLK
IN
DATACLK
OUT
DATA
t
D
= 6ns TYP
t
S
= –0.5ns TYP
t
H
= 2.9ns TYP
Figure 38. Data Timing, DLL Off, 1× Interpolation, DCLKPOL = 0
相關(guān)PDF資料
PDF描述
AD9786BSV 16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2】/4】/8】 Interpolation and Signal Processing
AD9786 16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2】/4】/8】 Interpolation and Signal Processing
AD9786BSVRL 16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2】/4】/8】 Interpolation and Signal Processing
AD9801 CCD Signal Processor For Electronic Cameras(用于電子照相機的CCD信號處理器)
AD9802JST Silver Mica Capacitor; Capacitance:10pF; Capacitance Tolerance: 5%; Series:CD17; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.9mm; Leaded Process Compatible:Yes RoHS Compliant: Yes
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9783 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 12-/14-/16-Bit, LVDS Interface, 500 MSPS DACs
AD9783BCPZ 功能描述:IC DAC 16BT 500MSPS LVDS 72LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF)
AD9783BCPZRL 功能描述:IC DAC 16BT 500MSPS LVDS 72LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k
AD9783-DPG2-EBZ 功能描述:BOARD EVAL FOR AD9783 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
AD9783-DUAL-EBZ 制造商:Analog Devices 功能描述:DUAL 16B, 500 MSPS LVDS DAC - Boxed Product (Development Kits)
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*