- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373967 > AD9782 (Analog Devices, Inc.) 12-Bit, 200 MSPS/500 MSPS TxDAC+ with 2 x /4 x /8 x Interpolation and Signal Processing PDF資料下載
參數(shù)資料
| 型號： | AD9782 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit, 200 MSPS/500 MSPS TxDAC+ with 2 x /4 x /8 x Interpolation and Signal Processing |
| 中文描述： | 12位，200 MSPS/500 MSPS的TxDAC系列與2 × / 4 × / 8 ×插值與信號處理 |
| 文件頁數(shù)： | 18/52頁 |
| 文件大?。?/td> | 1619K |
| 代理商： | AD9782 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
AD9782
Preliminary Technical Data
MSB/LSB TRANSFERS
The AD9782 serial port can support both most significant bit
(MSB) first or least significant bit (LSB) first data formats. This
functionality is controlled by register address DATADIR
(00h[6]). The default is MSB first. When this bit is set active
high, the AD9782 serial port is in LSB first format. That is, if the
AD9782 is in LSB first mode, the instruction byte must be
written from least significant bit to most significant bit.
Multibyte data transfers in MSB format can be completed by
writing an instruction byte that includes the register address of
the most significant byte. In MSB first mode, the serial port
internal byte address generator decrements for each byte
required of the multibyte communication cycle. Multibyte data
transfers in LSB first format can be completed by writing an
instruction byte that includes the register address of the least
significant byte. In LSB first mode, the serial port internal byte
address generator increments for each byte required of the
multibyte communication cycle.
Rev. PrC | Page 18 of 52
The AD9782 serial port controller address will increment from
1Fh to 00h for multibyte I/O operations if the MSB first mode is
active. The serial port controller address will decrement from
00h to 1Fh for multibyte I/O operations if the LSB first mode is
active.
NOTES ON SERIAL PORT OPERATION
The AD9782 serial port configuration bits reside in Bits 6 and 7
of register address 00h. It is important to note that the
configuration changes immediately upon writing to the last bit
of the register. For multibyte transfers, writing to this register
may occur during the middle of communication cycle. Care
must be taken to compensate for this new configuration for the
remaining bytes of the current communication cycle.
The same considerations apply to setting the software reset,
SWRST (00h[5]) bit. All other registers are set to their default
values but the software reset doesn’t affect the bits in register
address 00h and 04h.
It is recommended to use only single byte transfers when
changing serial port configurations or initiating a software
reset.
R/W N1
N0 A4A 3A
2A
1A
0
D7 D6
N
D5
N
D0
0
D1
0
D2
0
D3
0
D7 D6
N
D5
N
D0
0
D1
0
D2
0
D3
0
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
CSB
SCLK
SDIO
SDO
0
Figure 30. Serial Register Interface Timing MSB First
A0
A1
A2
A3 A4
N0
N1 R/W D0
0
D1
0
D2
0
D7
N
D6
N
D5
N
D4
N
D0
0
D1
0
D2
0
D7
N
D6
N
D5
N
D4
N
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
CSB
SCLK
SDIO
SDO
0
Figure 31. Serial Register Interface Timing LSB First
INSTRUCTION BIT 6
INSTRUCTION BIT 7
CSB
SCLK
SDIO
t
DS
t
DS
t
DH
t
PWH
t
PWL
t
SCLK
0
Figure 32. Timing Diagram for Register Write
DATA BIT n–1
DATA BIT n
CSB
SCLK
SDIO
SDO
0
t
DV
Figure 33. Timing Diagram for Register Read
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9786BSV | 16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2】/4】/8】 Interpolation and Signal Processing |
| AD9786 | 16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2】/4】/8】 Interpolation and Signal Processing |
| AD9786BSVRL | 16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2】/4】/8】 Interpolation and Signal Processing |
| AD9801 | CCD Signal Processor For Electronic Cameras(用于電子照相機(jī)的CCD信號處理器) |
| AD9802JST | Silver Mica Capacitor; Capacitance:10pF; Capacitance Tolerance: 5%; Series:CD17; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.9mm; Leaded Process Compatible:Yes RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9783 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 12-/14-/16-Bit, LVDS Interface, 500 MSPS DACs |
| AD9783BCPZ | 功能描述:IC DAC 16BT 500MSPS LVDS 72LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD9783BCPZRL | 功能描述:IC DAC 16BT 500MSPS LVDS 72LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD9783-DPG2-EBZ | 功能描述:BOARD EVAL FOR AD9783 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9783-DUAL-EBZ | 制造商:Analog Devices 功能描述:DUAL 16B, 500 MSPS LVDS DAC - Boxed Product (Development Kits) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。